具張及壓應力CESL應變矽MOSFET的特性分析

Characterization of Strained MOSFETs with Compressive and Tensile CESL Stressors

林洸宏(Kuang-Hung Lin)

指導教授 ： 陳雙源 ； 黃恆盛

國立臺北科技大學/機電學院/機電整合研究所/碩士(2010年)

https://doi.org/10.6841/NTUT.2010.00599

摘要

CESL(接觸蝕刻停止層)應變技術，是藉由MOSFET上的一層氮化矽薄膜，其產生的張應力及壓應力，間接使通道應力改變，提升載子遷移率，來增強電晶體的效能。
雖然有文獻探討張應力CESL應變技術在不同閘極長度對MOSFETs元件效能的影響，但很少對CESL應變技術加上雙軸應變作探討。故在本篇論文中，我們研究具張應力及壓應力CESL加上雙軸應變，在不同閘極長度，對MOSFETs特性的影響，也探討其GIDL漏電流，以及具壓應力CESL在不同Si-cap厚度，對MOSFETs電性的影響。
在長通道時 CESL張應力及壓應力都會使通道產生彎曲，因此pMOSFETs的汲極電流有明顯的增大，但nMOSFETs則不明顯甚至略為下降。在短通道時，CESL張應力使通道中晶格有拉開的效果，加上雙軸應變的效應，使nMOSFETs的汲極電流明顯提高，但pMOSFETs則有下降的現象。
本研究也利用電導方式，求得的載子遷移率的最大值。結果發現隨著通道的變短，張應力CESL使nMOSFETs的電子遷移率變的越大，壓應力CESL使pMOSFETs的電洞遷移率變的越小。另外，具張及壓應力CESL的MOSFETs，其GIDL漏電流皆較Si 控制樣本大，尤其對短通道元件更為明顯，推測應是CESL造成的缺陷，所導致的結果。

關鍵字

應變矽 ； 接觸蝕刻停止層

並列摘要

CESL stressor of uni-axial strained-Si technology is to deposit SiN layer on the MOSFETs devices. The device performance can be improved due to the mechanical stress produced by the SiN capping layer.
From previous literatures, CESL stressor with global strained-Si technology has not been clearly investigated. In this work, the impact of the CESL stressors with global strained-Si in terms of different lengths for 90 nm MOSFETs is studied. We also investigate the characteristics of pMOSFETs with compressive CESL stressor in terms of different thicknesses of epitaxy silicon layer. And measure GIDL currents to analyze the defect induced by CESL stressor.
For long channel device, it is because that the compressive and tensile CESL stressors bended the channel which produces the compressive strain in the channel. Therefore, the increment of the drain current for pMOSFETs has been revealed. In the contrary, the performance enhancement of nMOSFETs is not obvious. In short channel, the tensile stress in channel is produced directly from tensile CESL stressors. So, the stress of the tensile CESL stressors with global strained-Si has increased the drain current of nMOSFETs.
Transconductance method (Gm) is used to obtain the carriers mobility of the devices. As the gate length is becoming shorter, the mobility of the nMOSFETs with tensile CESL stressor is getting higher, while the mobility of pMOSFETs with compressive CESL stressor is getting lower. Also the GIDL current of strained MOSFETs with tensile and compressive CESL stressors are higher than Si control, especially for short channel devices. The phenomenon may be attributed to a great deal of defects induced by CESL stressors.

並列關鍵字

Strained-Si ； contact-etch-stop-layer (CESL)

參考文獻

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