界面能態量測技術差異性之研究

Analysis of Interface states Using Different Measurement Techniques

汪鉅晉(Ju-Jin Wang)

指導教授 ： 黃恆盛 ； 陳雙源

國立臺北科技大學/機電學院/機電整合研究所/碩士(2009年)

摘要

隨著元件不斷的微縮，氧化層愈來愈薄，氧化層的界面能態對於元件性能的影響加大，界面能態量測技術的準確性與適用性更受到重視。
在本研究中，採用聯電90 nm製程的兩種閘極介電層SiON與HfSiON，通道長度各為0.34 μm與0.09μm，閘極氧化層厚度為68 Å與25Å，寬度皆為10 μm作為實驗樣本，進行通道熱載子(CHC)時間3000秒應力測試，實驗溫度為25°C、75°C與125°C三種。
實驗過程中，兩種元件配合其特性各使用三種界面能態量測技術進行量測，對於介電層為SiON者，採用轉移電導、次臨界擺幅、閘二極體等技術；對於介電層為HfSiON者，採用轉移電導、次臨界擺幅、電荷汲引等技術，由量測的結果，來分析界面陷入電荷變化量ΔNit、ΔDit與氧化層陷入電荷變化量ΔNot進行討論。
研究結果發現次臨界擺幅技術中，次臨界擺幅的參數萃取，採用指數型式的趨勢線近似，可以得到較平整的ΔDit。轉移電導技術中，使用的遷移率劣化參數α，是以介電層是SiO2執行實驗整理出來的參數，對於HfSiON可能不適用。閘二極體技術中的ΔNit較大，可能因為界面陷阱只是其中一種電子電洞產生-復合中心。

關鍵字

界面能態量測技術 ； 界面陷阱 ； 次臨界擺幅技術 ； 轉移電導技術 ； 電荷汲引技術 ； 閘二極體技術

並列摘要

As gate dielectric is scaling down, the interface states affect the performance of devices to be more seriously. Therefore, the correctness and suitability of measurement techniques were become an important issue.
In this thesis, nMOSFETs on wafers from 90 nm node of UMC with two kinds of gate dielectrics (SiON and HfSiON) were characterized. The nMOSFETs with SiON gate dielectrics used in this experiments have L=0.34 μm with 68 Å gate oxide thickness. The nMOSFETs with HfSiON gate dielectrics used in this experiments have L=0.09 μm with 16 Å gate oxide thickness, all the Wg=10 μm. The devices were stressed under channel hot carrier (CHC) conditions at temperatures of 25, 75 and 125°C. After experiments, I-V measurements were used to characterize the electrical properties and hot-carrier (HC) effects of these devices.
In this work, two samples were characterized by using different measurement techniques. For SiON gate dielectric, the interface states were characterized by transconductance, subthreshold swing, and gated-diode methods. For HfSiON gate dielectric, the interface states were characterized by transconductance, subthreshold swing, and charge pumping methods. Some important interfacial parameters, including ΔNit, ΔDit and ΔNot, have also been characterized.
The experimental results indicated that the sub-threshold swing extracted by trend line of and exponential function can get reasonable ΔDit. For transconductance method, the parameter α (degradation of mobility) was extracted from SiO2 gate dielectric. It may be not suitable for HfSiON gate dielectric. There is an amount of ΔNit extracted from gated-diode technique, it may be due to interface trap just only one of generation-recombination centers.

並列關鍵字

Interface States ； transconductance technique ； sub-threshold swing technique ； gated-diode technique ； charge pumping technique

參考文獻

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