在自動停車系統的相關技術中不論是用影像處理、模糊理論或路徑規劃等方法,系統內皆需要複雜的運算以及即時的反應,而使用硬體之方式來實現以上之功能相較於使用微控制器(microcontroller)之方式其效能呈現上,更為優異且使其系統之計算速度能大幅提升,而本文以硬體描述語言(Verilog HDL) 實現在FPGA(Field Programmable Gate Array)並設計一個控制器且搭配超音波感測器,使車輛在行徑過程中可利用感測器來偵測車輛之可停空間,且利用FPGA之快速的處理運算、反應時間快與增加硬體設計上的彈性等優點來改善其自動停車完成之時間,再利用FPGA來實現本研究提出之停車軌跡演算法,由實驗結果得知,本方法可減小所需之停車空間,且亦可大幅度地縮短所需之停車路徑規劃計算時間。
The techniques of image processing, fuzzy logic control, or path planning in automatic parking system need more complexity computation and fast real time response. Normally, using the hardware to implement the automatic parking system have higher performance than using software. In this work, we propose an automatic parking system to improve the parking computation time and implement this system into FPGA for a car-like vehicle. The detection of parking space unit, control unit and decision of vehicle position unit are implemented into a single FPGA device to reduce parking computation time. Experiment results show that the proposed car-like vehicle can reduce parking space and reduce the parking computation time.