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  • 學位論文

系統化EMI量測對消除筆記型內PCB雜訊之研究

A study of systematic EMI measurements for reducing the noise in PCB of the notebook computer

指導教授 : 劉宗平
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摘要


本研究之重點在於運用系統化量測的技巧,探討對筆記型電腦内PCB之EMI以期於設計的初期,針對PCB的EMI污染源,有效的引入壓制電磁干擾的對策;此種方法勝過製作一個較好的機殼。 本文所提出的之系統化量測,包含高速訊號之完整性、電源雜訊大小以及介於二個地平面之間的RF差別電位之量測。同時這些方法可於示波器上監看時域及頻域間的相互關係,由於不同的波形變異可反應出頻譜上的傅立葉包線分佈。 另外,所建立的外部輸入/輸出電纜訊號檢驗,它是一種最有成本效益的近場量測方法,經由此種量測可檢測出於電纜上之共模雜訊大小,並藉助所演算之近場界線表,可快速地判斷此版本的PCB是否符合CISPR 22 Class B的10米輻射測試。 目前歐、美、日等先進工業化國家,對於商品之電磁相容性管制之推展施行有年,舉日本為例,目前已實施有各類標誌,藉以強制性管理規定;又如美國所實施之FCC登錄制度(現在部份商品已改為自行宣告制)已被美國規定為商品行銷市場之必備條件;歐洲方面之電磁相容指令(EMC)已推展多年,已於一九九六年一月開始實施強制性規定產品CE標示制度。而我國對於進口之電器產品也已列為管制要項, 對於國內所販售電子資訊產品也不定期予以抽驗, 可見EMC 之設計是每位Design 工程師必須考量的要素。 本人認為設計人員之目的就是要設計出符合需求,滿足國際之EMC規範及一般工業標準的產品。而最直接且有效的辦法是針對PCB上之Layout來做完整的設計。而藉由本論文裡所建立之系統化量測方法, 可立即的尋找到最初PCB設計階段上EMI之干擾源,以避免使用多餘的壓制電磁干擾的被動元件,且兼顧到品質的完整性。

關鍵字

雜訊減除

並列摘要


The key point in this study is planning to find out EMI noise sources via a created systematic measurements. We can obtain complete information for regarding the EMI phenomenon, including high speed signal integrity in time domain and frequency domain, power noise level, and grounding loss by means of utilizing oscilloscope measurement with FFT techniques. Besides, the created external input/output signal checking could be the most cost-effective near-field measurement once there is common mode noise radiated in its cable. Due to the application of high-data transmission technologies and the increasing complexity of printed circuit board, electromagnetic interference (EMI) may reduce system integrated performance, cause logic errors, or even interfere the signal of the device. As the electromagnetic spectrum becomes more common, especially for digital hardware design, the importance to control electromagnetic interference (EMI) becomes more urgent and imperative. As a result, most governments have imposed upon a myriad of rules and regulations on electronic equipments, which must be met before the product can be launched legally. In other words, any piece of QUALIFIED electronic equipment has to achieve electromagnetic compatibility(EMC). In current high-speed design industry, it has being indispensable to consider the phenomena of electromagnetic interference during the early PCB layout stage. Nevertheless, Some EMI design aspects are sometime neglected during the PCB layout phase. In this thesis, the systematic EMI PCB measurement methodology is applied to evaluate the proto-type PCB. The techniques also includes concepts both for the development and specification of EMI design modes. In order to ensure the PCB to comply with requirements, which are identified in the Chapter 3 of this thesis. Moreover, the source suppressing can be regarded as the effective and cost-efficient solution to the EMI problems in the early design stage. Therefore, taking the advantages of this process, we can find out the situation of the signal integrity in the time domain and the FFT spectrum envelopes simultaneously. Meanwhile, it provides an near field measurement process to investigate where the noise source and what the EMI root cause that is parasitically existed in the notebook PCB.

並列關鍵字

noise reduction

參考文獻


[1].Mark I. Montrose, “EMC and the Printed Circuit Board”, IEEE Press Series on Electronics Technology, Preface xiii-xv, 1998.
[4].Christos Christopoulos, “Principles and Techniques of Electromagnetic Compatibility”, CRC Press, Inc., P. 003-005, 1995
[6].Christos Christopoulos, “Principles and Techniques of Electromagnetic Compatibility”, CRC Press, Inc., P22-25, 1995.
[7].Clayton R. Paul, “Introduction to Electromagnetic Compatibility”,Wiley Series in “Microwave and Optical Engineering”, 1992.
[8].Henry W. Ott, “Noise Reduction Techniques in Electronics Systems”, John Wiley & Sons, 1988.

被引用紀錄


陳清祥(2008)。電子產品電磁相容性設計與除錯對策之探討〔碩士論文,國立臺北科技大學〕。華藝線上圖書館。https://doi.org/10.6841/NTUT.2008.00282

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