改善PCB阻抗模式之研究─以八層板和十層板為例

The Study of Improving the Impedance Model of PCB

劉至偉(Chih-Wei Liu)

指導教授 ： 江行全

元智大學/工程學院/工業工程與管理學系/碩士(2003年)

摘要

由於電信和電腦操作的速度和切換速率不斷增長，在高頻的條件下，當PCB之特性阻抗設計不良時，會造成傳輸線回路不良的問題，以及PCB上信號的品質和傳遞訊號的時序誤差等問題，影響甚大。因此，控制阻抗在一定的範圍內是必然的工作，以確保在 PCB 線路和內部連接之間的轉換正確無誤。
在實務上，當廠商作工程設計時，並無一定的規則來調整影響線路阻抗之線寬值，而是以工程師的經驗法則來判斷。因此，本研究的目的是期望建立阻抗偏離值及線寬調整值的關係圖或表，當製程變異過大時，以提供業者一個較精確的阻抗設計預估值，而滿足顧客所要求的阻抗規格。
本研究將所蒐集來的資料依阻抗設計模式（疊構形式）分成Surface Microstrip（SM）、Offset Stripline（OS）、 Edge-Coupled Surface Microstrip（ECSM）和Edge-Couple Offset Stripline（ECOS）四類，然後分別配適線性迴歸模型和非線性之類神經網路模型，最後會以類神經網路模型中的倒傳遞網路（BPN）找出PCB阻抗與各因子間之較佳參數設定，以建立阻抗偏離值與線寬調整值之關係。
本研究結果顯示BPN模型較回歸模型佳。在配適BPN模型時，四種阻抗設計模式之RMS error分別為0.1228、0.0807、0.0572和0.1339，模型之錯誤率都很小。因此，本研究所提出的阻抗偏離值與線寬調整值之關係圖和表，在當時生產機台的參數條件下，可以提供PCB設計廠商做工程設計時，依此圖表以內插法則作調整。

關鍵字

印刷電路板 ； 阻抗設計 ； 倒傳遞網路

並列摘要

Because of development of technology, the speed of exchange of telecommunications and computers are increasing. In high frequency condition, when PCB’s characteristic impedance is unhealthy, it makes the problems of signal quality and time error of transmission signal, And the effects is serious. Therefore, to control impedance design is a important topic and to ensure the transform between PCB’s circuit and interior connection is correct.
In practical, the engineers usually adjust the PCB’s circuit wide to change impedance by their experience. Therefore, this study hopes to build the relation figures and tables between the deviated value of impedance and the adjustment value of circuit wide. This study expects to provide PCB’s company the precise impedance estimation to satisfy the requests of product quality when the variation of manufacture process is serious.
This study classified the data to four impedance design models: Surface Microstrip(SM), Offset Stripline(OS), Edge-Coupled Surface Microstrip(ECSM) and Edge-Couple Offset Stripline(ECOS). Then, it individually fits linear regression models and non-linear neural networks models. Eventually, this study uses back-propagation network (BPN) to find the better set of parameters between PCB’s impedance and its factors.
The result shows that the BPN model is better than regression model about the data in this study. Four RMS error values of impedance design models are individually 0.1228, 0.0807, 0.0572 and 0.1339 when it fits BPN models. The rate of error is very low. Therefore, this study hopes to provide the PCB’s company the relation figures and tables between the deviated values of impedance and the adjustment values of circuit wide at that produced conditions. The engineers refer to the figures and tables in this study to adjust impedance design by using interpolation.

並列關鍵字

PCB ； Impedance design ； Back-propagation networks (BPN)

參考文獻

Andrew J. Burkhardt, Christopher S. Gregg, and J. Alan Staniforth (2000), “Calculation of PCB Track Impedance,” Circuit World, Vol. 26, No. 1, pp. 6-10.

Haykin, Simon (1999), Neural Networks: A Comprehensive Foundation, 2nd ed., Prentice Hall International, Inc., New Jersey.

IPC-2141, (1996), Controlled Impedance Circuit Boards and High-Speed Logic Design, April.

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