重組態架構系統資源狀態之擷取

Capture System Resource on Reconfigurable Architecture

陳奕成(Yi-Cheng Chen)

指導教授 ： 黃朝章

元智大學/資訊學院/資訊工程學系/碩士(2006年)

https://doi.org/10.6838/YZU.2006.00043

摘要

本論文提出一系統資源擷取資訊之方法，提供重組態架構系統取得目前硬體系統資源的使用資訊，以便決定置換下一狀態模組時機。在重組態架構中，往往無法即時得知目前硬體實際使用資訊，主因在於動態重組態架構以模組化方式進行，架構設計方式是以Xilinx公司所提供的軟體進行重組態架構之設計；運用模組化方式設計，其過程多步驟且繁雜，並且在運作平台進行編譯與組譯後，僅產生運行後之結果報告，並無法將目前使用狀態告知系統，當系統將進行下一功能時，無法從多個模組中選擇適當模組進行置換，也無法提供系統決定能否重組態。因此，我們為使重組態架構系統可瞭解目前硬體實際狀況，必須擷取各模組目前之訊息，提供系統監控單元依據目前硬體元件之使用狀況，並依照系統需求與可置換區域可接受之空間，置換系統另一功能模組，使重組態架構系統更具效能與穩定。

關鍵字

可程式邏輯閘陣列 ； 可重組態架構

並列摘要

In this paper we proposed a method to capture the FPGA system information for a dynamic reconfigurable architecture. We proposed this idea in order to design reconfigurable architecture easier and flexible. The FPGA system information report recorded how many logic gates were used. The kernel system can decide which sub-module is suitable for the system from the FPGA system information.
In traditional reconfigurable architecture, the information of current system situation was hard to know. It was confined by the design rule of FPGA provider. In the dynamic reconfigurable architecture, there were two design modes: one was Difference Base Design (DBD) and the other was Module Base Design (MBD). When a system was designed with MBD mode, system couldn’t get correct usage information as sub-module change. If there were a lot of functions, they will be implemented. The reconfigurable architecture systems demand more free space on the FPGA. Now we proposed a method to capture the current usage information as corresponding to every sub-module. The whole system knew how many logic component had used, and selected the best sub-module. The whole the system can be improved more flexible and high performing.

並列關鍵字

FPGA ； Reconfigurable Architecture

參考文獻

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