使用於WiMAX發射機 3.5GHz功率放大器與高線性混頻器之研製

The Study and Implementation of 3.5GHz Power Amplifier and High Linearity Mixer for WiMAX Transmitter

葉子豪(Tzu-Hao Yeh)

指導教授 ： 楊正任

元智大學/工程學院/通訊工程學系/碩士(2006年)

https://doi.org/10.6838/YZU.2006.00156

摘要

本論文以單晶微波積體電路(MMIC)製程設計符合802.16-2004標準、3.5GHz頻帶之高頻積體化功率放大器與混頻器。本論文中所採用的各項電路模型係透過國家晶片中心(CIC)所提供之WIN 0.15um pHEMT，TSMC 0.18um CMOS製程所設計。
可變增益功率放大器經模擬後，其增益為23.003 dB，輸出1 dB壓縮點為30 dBm，功率轉換效率為31.4%，輸出三階截斷點為39.8dBm，可變增益範圍大於30dB，整體晶片面積為1×2 mm2 。
高線性度可變增益混頻器經量測後，在高增益模態下，其轉換增益為8.4dB，輸出1 dB壓縮點為-7dBm，輸出三階截斷點為2dBm，各埠訊號隔離度大於30 dB；在低增益模態下，其轉換增益為1.4dB，輸出1 dB壓縮點為-6.6dBm，輸出三階截斷點為5dBm，各埠訊號隔離度大於25 dB。晶片面積為0.96×0.79 mm2。

關鍵字

發射機 ； 混頻器 ； 功率放大器

並列摘要

In this paper, we designed a power amplifier and high linearity mixer by monolithic microwave integrated circuit (MMIC) technology. The specifications of designed power amplifier are fulfilled the requirements of IEEE 802.16-2004 WiMAX standard. The power amplifier is implemented with WIN 0.15μm pHEMT and the high linearity mixer is implemented with TSMC 0.18μm CMOS processes.
The simulation result of the power amplifier, gain is 23.003 dB, output at the 1-dB gain compression point is 30 dBm, power added efficiency is 31.4%,output third order intercept point is 39.8 dBm, tuning range is greater than 30dB. The chip size of the circuit is 1×2 mm2.
The measurement result of the mixer, drive on the high gain mode, conversion gain is 8.4 dB, output at the 1-dB gain compression point is -7 dBm, output third order intercept point is 2 dBm, port to port signal isolations are greater than 30dB. Drive on the low gain mode, conversion gain is 1.4 dB, output at the 1-dB gain compression point is -6.6 dBm, output third order intercept point is 5 dBm, port to port signal isolations are greater than 25dB.The chip size of the circuit is 0.96×0.79 mm2.

並列關鍵字

WiMAX ； mixer ； power amplifier ； transmitter

參考文獻

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