24GHz射頻收發機前端電路應用

Designs and implementations of 24GHz RF front integrate circuits

袁名宏(Meng-Hung Yuan)

指導教授 ： 黃建彰

元智大學/電機通訊學院/通訊工程學系/碩士(2011年)

https://doi.org/10.6838/YZU.2011.00351

摘要

本論文使用台積電所提供的1P6M 0.18μm CMOS製程實現設計24GHz射頻收發機前端電路,包含低功率雜訊放大器,功率放大器及收發切換開關。
為實現高功率要求,在功率放大器中並聯兩個功率輸出級,希望藉此提高飽和輸出功率以及壓縮點輸出功率;低雜訊放大器利用電流重用架構來降低雜訊放大器功率消耗；使用多段FET架構在寬頻時,關的狀態時提供一個較低的阻抗路徑，可以有著較低的插入損失跟較好的隔離度。最後探討實驗結果與模擬誤差原因及改進方式。

關鍵字

低雜訊放大器 ； 功率放大器 ； 切換開關

並列摘要

This thesis utilizes the TSMC 1P6M CMOS technologies to design the power amplifier (PA) and the front chip including PA、low noise amplifier(LNA) and transmit/receive for K band(24GHz)。
The power stage combination is added for Pas to satisfy high power demands. This design approach has the advantages of high power and high compress point simultaneously. In addition the current reuse topology is used for LNA design to improve the power consumption .In the switch design stacked FETs with low
resistance adopted to decrease insertion loss and improve isolation
Finally, the difference between simulation and measurement results are addressed with some possible improvement directions.

並列關鍵字

Low noise Amplifier ； Power Amplifier ； T/R Switch

參考文獻

[1] 陳勛祥,林愷“A Design for a Fully Integrated High-Gain LNA with 1.5dB-NF with 1.5dB-NF”

[2] Abou-Allam,E.;Manku,T.;,〝A low voltage design technique for low noise RF integrated circuits,〞Circuits and systems,1998.ISCAS 98.Proceedings of the 1998 IEEE International Symposium on,vol.4,no.,pp.373-377 vol.4,31 May-3 Jun 1998

[3] Karanicolas, A.n.;〝A 2.7-V 900-MHz CMOS LNA and mixer,〞Solid-State Circuits,IEEE Journal of,Vol.31,no.12,PP.1939-1944,Dec 1996

[4] Shin, S.C., Tsai, M.D., Liu, R.C., Lin, K.Y., and Wang, H.: ‘A 24-GHz 3.9-dB NF low-noise amplifier using 0.18 mm CMOS technology’, IEEE Microw. Wirel. Compon. Lett., 2005, 15, (7), pp.

Aviv, Israel, 2008, pp. 1–10