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  • 學位論文

應用於2.45GHz微波頻段之倍壓電路實作

Implementation of a 2.45GHz Voltage Multiplier

指導教授 : 甘堯江
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摘要


本論文設計應用於2.45GHz整流天線的倍壓電路,首先闡述倍壓電路的操作原理與電路類型,之後設計並實作單階倍壓電路,最後總結成果與可改進方向。所研究的倍壓電路可分為三部份: 使用微帶線製作的阻抗匹配電路、蕭特基二極體電路與含100pF電容及50Ohm電阻的後端負載電路。倍壓電路的輸入阻抗因輸入功率不同而有所變化,因此論文中首先針對輸入功率由0dBm、-10dBm、-20dBm至-30dBm範圍,利用ADS模擬軟體設計相對應的倍壓電路,並且使用Agilent E5071B網路分析儀量測所實作的倍壓電路之反射係數,以確認所設計倍壓電路的工作頻率。然後,利用訊號產生器作為所設計倍壓電路的輸入訊號,並由示波器觀察與記錄在負載電阻端的電壓變化。量測結果顯示當功率低於-20dBm時,蕭特基二極體不能被驅動,所設計的倍壓電路無法工作。這些電路在規劃的輸入功率時,其輸出電壓大致在45mV,電路整流效率介於15%左右。未來工作應考慮輸出入端的共軛阻抗匹配(conjugate impedance match)為電路設計依據,以提升功率轉換效率。

並列摘要


The design and implementation of the voltage multiplier in the rectifier antenna (rectenna) is studied in this thesis. The basic theory of the voltage multiplier is first reviewed and followed by the design and implementation of the single-stage voltage multiplier. The proposed voltage multiplier is comprised of the impedance matching circuit using the microstrip lines, the Schottky diode circuit, and the RC load circuit. The RC load circuit includes a 100 pF capacitance as an output filter and resistance of 50 Ohm as an output load resistor. The target input powers for the voltage multiplier are 0dBm, -10dBm, -20dBm and -30dBm at 2.45GHz. The single-stage voltage multiplier is designed using the ADS software and the reflection coefficients are measured by the Agilent E5071B. The output powers of the proposed circuit are then measured by using a signal generator as the input source and a oscilloscope as the output monitor. The Schottky diode is not operated when the input power is less than -20dBm and the circuit basically is not working at this point. On the contrary, the most output powers of the proposed multiplier are around 45mV if the designed input power is employed. The conjugate impedance matching between the input and output ports should be applied to lift the efficiency from the current value, 15%.

參考文獻


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