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  • 學位論文

使用多階類神經網路改進掃描鏈檢測準確率

Improving Scan Chain Diagnostic Accuracy Using Multi-Stage Artificial Neural Networks

指導教授 : 黃錫瑜

摘要


晶片異常的原因往往是來自於掃描鏈上的瑕疵,因此為了找到晶片上可能故障的地方,掃描鏈的分析即成為不可或缺的要求。如今,晶片故障分析工程師可藉由一些分析工具來找出可能發生問題的位置,而其分析結果通常都能令人滿意。然而,當掃描鏈上的瑕疵為間歇性時,其診斷後的準確率將會大幅降低,間歇性的掃描鏈瑕疵即是當訊號在掃描鏈中傳遞時,掃描鏈上的瑕疵有時會發生,有時則不會,進而增加找出瑕疵位置的困難性。在這個work之前,在我們實驗室已成功將多階類神經網路應用於間歇性stuck-at-0 fault的診斷,但對於其分析的準確率仍有一段可改善的空間,並且在以前的work中,我們也發現它在一些訓練神經網路的過程中,只考慮掃描鏈發生永久性錯誤時的資訊,卻忽略了其發生間歇性錯誤時的行為影響,造成診斷準確率不夠高的原因,因此這篇論文將提出一些技術來提升診斷的準確率,讓神經網路診斷能更為有效與可靠。首先,我們會將掃描鏈發生間歇性錯誤時的資訊更完整得納入訓練神經網路的過程中,並額外增加一個驗證的程序,使神經網路能隨著每一階的訓練而自我更正。第二,我們加入了權重的觀念來強化了每一筆訓練神經網路的資料,使神經網路能更精準得學到掃描鏈上每個單元在發生不同間歇性瑕疵時的資訊。最後,我們也明確地定義了在多階的類神經網路中,我們所需使用的階層數。在使用ITC’99系列下的測試電路所做的實驗結果顯示,我們的方法得到的平均準確率能比以前的work高17.9%,且也能比一商業軟體高17.5%。

並列摘要


Failing chips are commonly caused by scan chain failures. So scan chain diagnosis is the necessary process to spot for the defects. Nowadays, a failure analysis engineer can use diagnosis tools to narrow down the possible locations of the faulty scan cell, and the diagnostic results can often be satisfied. However, when the fault is intermittent, the diagnostic accuracy will significantly decay. An intermittent scan chain failure sometimes is triggered and sometimes is not triggered during scan chain shifting, which makes it very difficult to locate the fault sites. Before this work, multi-stage artificial neural networks (ANNs) have been successfully introduced into the scan chain diagnosis for intermittent stuck-at-0 fault in the previous work by our lab. But its diagnostic accuracy has room for improvement. Also, we found, in some process of the previous work, it only considered the information of permanent fault to train the ANN models, but ignored the intermittent fault behavior, which results in insufficient accuracy. Therefore, in this work, we proposed some techniques to improve the diagnostic accuracy and make it more robust. First of all, we include the information of intermittent fault and adopt the validation process to let ANN correct itself. Secondly, we added the concepts of the weights to enhance each training data so that ANN can learn more precise features between several behaviors of different faulty scan cells at various intermittency. Lastly, we clearly defined the number of stages that need to be used in the multi-stage ANNs. From the experimental results on ITC’99 benchmark circuits, it showed that this method is, on average, 17.9% more accurate than the previous work, and 17.5% higher than a state-of-the-art commercial tool.

參考文獻


[1] R. Guo, and S. Venkataraman, “A Technique for Fault Diagnosis of Defects in Scan Chains”, Proc. Int’l Test Conf., pp. 268-277, 2001.
[2] J.-S. Yang and S.-Y. Huang, “Quick Scan Chain Diagnosis Using Signal Profiling”, Proc. of Int’l Conf. On Computer Design, pp. 157-160, Oct., 2005.
[3] J. Hirase, “Scan Chain Diagnosis Using IDDQ Current Measurement,” Proc. of Asian Test Symposium (ATS), pp. 153-157, 1999.
[4] P. Song et al., “A Novel Scan Chain Diagnostics Technique Based on Light Emission from Leakage Current”, Proc. of Int’l Test Conf., pp. 140-147, 2004.
[5] K. Khusyari, W.T. Ng, N. Jaarsma, R. Abraham, P. W. Ng, B. H. Ang, and C. H Ong, “Diagnosis of Voltage Dependent Scan Chain Failure Using VBUMP Scan Debug Method”, Proc. Asian Test Symp., pp 271, 2008.

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