使用統計學的方法分析電路的可測試性

A Statistic-based Approach to Testability Analysis

邱創祺(Chuang-Chi Chiou)

指導教授 ： 王俊堯

國立清華大學/電機資訊學院/資訊工程學系/碩士(2007年)

https://doi.org/10.6843/NTHU.2007.00090

摘要

本論文提出一個利用統計的方法來計算出組合電路中每個節點的可測性。這個可測性分析的方法是將問題轉化為蒙地卡羅的模組來做模擬分析，透過定義模擬的條件後，蒙地卡羅的模擬能在結果達到我們事前所定義的信心水準以及誤差內停止。我們的實驗部分是使用一系列的ISCAS'85以及MCNC測資，和先前的研究相比，我們的方法更能有效的算出電路的可測性同時又有較高的準確度。

關鍵字

測試

並列摘要

This paper presents a statistic-based approach for evaluating the testability of nodes in combinational circuits. This testability measurement is obtained via Monte Carlo simulation governed by the formulated Monte Carlo model. The Monte Carlo simulation is terminated when the predefined error with respect to the Monte Carlo model, under a specified confidence level, is achieved. We conduct the experiments on a set of ISCAS'85 and MCNC benchmarks. As compared with previous work, our approach more efficiently evaluates the testability with less error.

並列關鍵字

testing

參考文獻

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