應用於邏輯製程之回填型接觸點電阻式記憶體研究

The Study of Backfill Contact Resistive Random Access Memory in CMOS logic Technologies

陳宏昱(Hung-Yu Chen)

指導教授 ： 金雅琴

國立清華大學/電機資訊學院/電子工程研究所/碩士(2015年)

摘要

在半導體製程持續的快速進展下，從移動式電子產品到穿戴式電子產品都追求著低功耗和高密度的方向。意指著記憶體元件勢必要往非揮發記憶體(Nonvolatile Memory, NVM)靠攏，但是目前主流的快閃記憶體(Flash Memory)面臨到操作電壓太高和製程微縮的問題。於是在新型非揮發記憶體中的電阻式記憶體有極大的潛力。
本篇論文改善先前提出的接觸點電阻式記憶體(Contact Resistive Random Access Memory, CRRAM)，在原先的做法是利用接觸窗大小控制蝕刻電阻保護氧化層(Resistor Protection Oxide, RPO)效率。但因蝕刻變異性過大，導致薄膜厚度不均勻，進而導致電性變異與良率過低。
為此發展出新型結構為回填型接觸點電阻式記憶體(Backfill Contact Resistive Random Access Memory, BCRRAM)，在蝕刻接觸窗時，會以過蝕刻的方式將電阻保護層結構清除，以利於厚度控制。接著用電漿化學氣相沉積(Plasma-enhanced chemical vapor deposition, PECVD)回填二氧化矽(SiO2)，達到良好的厚度控制，且可套用於其他世代製程上。此結構可以接受一百萬次循環設定與重置和85oC二千小時烘烤，仍顯示可靠的資料儲存。
最後因為回填型接觸點電阻式記憶體是單極性電阻式記憶體，在操作時有過度寫入(Over Programming)疑慮。為了穩定元件的操作，導入逐步增加脈衝寫入(Incremental-step-pulse programming, ISPP)，逐步增加電壓更完善的控制阻值轉換，以達到提高耐久度。在一百萬次操作中，高低阻態差皆大於50倍。

關鍵字

邏輯製程非揮發性記憶體 ； 電阻式記憶體 ； 1T1R

並列摘要

In recent years, VLSI technology develops rapidly. Portable and wearable electronics products demanding low power high density nonvolatile memory. Flash Memory, the mainstream NVM, faces high operating voltage and process scaling problems, so resistive random access memory shows great potential in advance NVM devices.
This study proposed methods to improve the developmental issues of Contact Resistive Random Access Memory (CRRAM).The original CRRAM is fabricated by controlling RRAM thickness and contact size. Due to instability of contact hole etching rate, RRAM film could be non-uniform and affect yield rate. Backfill Contact Resistive Random Access Memory (BCRRAM) is proposed to solve this problem. A thin RRAM film is deposited into each contact hole by PECVD, instead. The BCRRAM can endure 1000k cycles and 85oC 2000hr baking without data alternation. Through experiment, the device proves no reliability concerns.
BCRRAM is a unipolar RRAM. Over programming damage may occur during reset operation. Therefore, Incremental Step Pulse Programming (ISPP) is included to optimize SET/RESET cycles to improve BCRRAM endurance. The ratio of LRS/HRS is greater than 50X, with more than 1000k cycles.

並列關鍵字

logic NVM ； RRAM ； 1T1R

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