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  • 學位論文

相容於邏輯製程之新型一次性寫入類比記憶體

A Novel CMOS Logic Compatible Analog One-Time-Programmable Memory

指導教授 : 林崇榮

摘要


近半年,半導體記憶體除了在個人化電子裝置上的需求日益增加外,在生醫電子方面也逐漸地展現出對於半導體記憶體的需求,例如:仿神經電路之記憶功能,這類仿神經記憶性能通常是利用快閃式記憶體或是EEPROM之技術組合成類比式記憶體電路,因此會面臨到比內嵌式記憶體高的製作成本以及操作電壓。 本論文提出一新型內嵌式無閘極一次性寫入類比記憶體結構,此記憶體優點包括:製程歩驟簡易、和CMOS邏輯製程技術完全相容。此內嵌式無閘極一次性寫入類比記憶體包含一無閘極儲存點與一控制電晶體。此元件之儲存點是建立在一寄生的ONO結構,ONO結構由氧化層,接觸蝕刻停止層,和內部間介電層組成;元件之離子佈植區的形狀經過設計,可以在使用通道熱電洞引發熱電子注入的寫入操作下,以分段導通的方式逐漸的增加電流,並且能夠儲存在1.8A~2.3A電流區間中任意連續值之電流。本論文同時利用三維製程及元件模擬器進行元件特性驗證與最佳化分析。

關鍵字

類比記憶體

並列摘要


In recent years, demands in the semiconductor memories has increased, while biomedical electronics also gradually shows its demands for non-volatile memories, such as applications in neural circuits. However the manufacturing cost of embedded Flash memory is much higher than that of CMOS logic technology. This thesis presents a novel embedded Analog Gateless One-Time-Programming Memory, which is fully compatible to CMOS process. The gateless memory structure includes a gateless storage node and select transistor; the charge storage node is based on a parasitic ONO structure. The cell can be programmed by CHHIHE (Channel Hot Hole Induced Hot Electron) injection. The source implant is well designed, which can let the storage node partially turned-on and gradually increase the read current level, the storage level can reach any state between 1.8A and 2.3A. In this paper, the electrical characteristics of this cell were also investigated by three-dimensional device simulation.

並列關鍵字

Analog Memory

參考文獻


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