本研究之重點在於採用分散式架構,設計一高效能寬頻放大器,主要目標為降低功耗與晶片面積,並同時能有效提升寬頻放大器之增益頻寬。 文中一開始將實做一使用電感增強頻寬之串疊架構的分散式放大器,分別採用日月光半導體之Above-IC製程,與0.18微米台積電標準CMOS製程,試以比較兩者之特性,試圖藉由Above-IC製程改善被動元之高頻特性,減少高頻集膚效應對整體電路的影響,經由量測結果可知,Above-IC製程的確可改善電路高頻特性,並達到低功耗之分散式放大器。 再來設計一以變壓器為基底之分散式放大器,採用台積電0.18微米與0.13微米製程,試以變壓器取代傳統分散式放大器之電感,如此可以在低功耗的操作下,達到高增益頻寬的分散式放大器。
This study focuses on designing a high performance broadband amplifier using distributed topology. The main target is to reduce the power consumption and chip area, and improve the gain-bandwidth of distributed amplifier at the same time. First, the bandwidth-enhanced cascode topology by inductor is adopted. And the circuit is fabricated by ASE Above-IC technology and 0.18μm tsmc standard CMOS technology respectively. The Above-IC technology could improve the passive components characteristics and reduce the impact of skin effect in high frequency. From the measurement, Above-IC technology could improve the circuit high frequency performance, and reduce the power consumption. Next, the transformer-based distributed amplifier using tsmc 0.18μm and 0.13μm standard CMOS technology are presented. With transformers replacing the inductors in traditional distributed amplifier, the high gain-bandwidth distributed amplifier could be achieved under low power consumption.