考量等候時間限制之半導體製造在製品分配及控制方法

WIP Allocation and Control Considering Time Constraint in a Semiconductor Manufacturing System

黃嘉常(Jia-Chang Huang)

指導教授 ： 劉志明

國立清華大學/工學院/工業工程與工程管理學系/碩士(2007年)

https://doi.org/10.6843/NTHU.2007.00360

摘要

半導體產業在競爭的環境之下，如何提高生產量，並藉由降低在製品水準來降低生產週期時間為首要課題。而半導體製造當中存在著再回流特性與複雜的製程，使得在製品存貨量的管理變得相當困難。在管理者無法掌控在製品存貨量的情況下，會造成產出量不穩定，生產週期時間更加不易掌控，週期時間的變異也跟著上升，因此，本研究提出了一套在製品存貨的控制方法，利用倒傳遞類神經網路(Back Propagation Neural Networks；BPNN)來釐清產出、生產週期時間、在製品水準這三者的關係，並且訂下整廠與瓶頸工作站最適的在製品水準。
此外，在考量某些上下游站別之間存在的等候時間限制，本研究利用倒傳遞類神經網路找出等候限制時間的長短與在製品數量的關係，以決定出該站別的在製品水準上限，以避免在製品數量過多導致等候時間超過等候時間的限制，有效降低因超過等候時間限制而重工的機率；沒有等候時間限制的站別則先透過過去歷史資料的分析整理，找出上游機台批量大小與下游機台的來到間隔時間變異係數(Ca)的關係，並將此Ca值代入等候線理論中的GI/G/m模型來決定其該分配到的在製品數量為多少。最後，以參考文獻當中所提出的最小存貨變異派工法則(MIVS)為基礎，並針對此派工法則如未考量多種產品組合、以及將在同一個生產優序內的每個晶圓批的重要性視為相同等缺點，利用X-Factor來作為第二層次的派工優序判斷標準，使得原先所定下的每個工作站的標準在製品水準得以藉由此修正後的MIVS派工法來加以維護。透過此新在製品標準，再加上兩層次的派工判斷，使平均生產週期時間降低了約11%，生產週期時間的變異則下降了約13%，此外，因超過等候時間限制而重工的機率也能夠有效下降。

關鍵字

在製品存貨量 ； 在製品分配與控制 ； 等候時間限制 ； 等候理論 ； 類神經網路

並列摘要

In order to meet the requirement of short product life cycle, the goal of most semiconductor manufacturing is to reduce its manufacturing cycle time and to deliver products at the right time. Base on Little’s Law, cycle time is proportional to the WIP level, given the same throughput rate. Therefore, in order to reduce the cycle time, the most important thing is to control the WIP. From the Theory of Constraints (TOC) , the throughput of a bottleneck workstation is the determinant of the entire fab throughput ,so the first step to control the WIP is to set reasonable WIP levels for the bottleneck workstation and the entire Fab, In this study, the bottleneck WIP and the total fab WIP are estimated by using the neural networks, and then the remaining WIP are allocated to other operations .
In addition, because of yield consideration, a queue time limit is usually set between two continuous operations, which are called the queue time constraint. If the queue time of a lot exceeds the queue time constraint, the lot will be send back to the previous operation for rework .If the times of rework are too many, a lot may even be discarded. So, before allocating the WIP to each operation, setting a reasonable WIP level for the operations which contain the queue time limit to prevent lots from exceeding the limit is necessary. The WIP levels of operations without time constraint are allocated by using the queueing theory.
After setting the standard WIP level of all operations, a dispatching rule to maintain those standard WIP level should be applied. From literature review, there are many useful dispatching rules to reduce the mean cycle time and the standard deviation of the cycle time. But most of them still have some shortages. So in this study, a revised dispatching rule is developed to maintain those standard WIP levels of each workstation and operation, and the mean cycle time and the standard deviation of the cycle time can be effectively reduced.

並列關鍵字

WIP level ； WIP control ； queueing theory ； neural network ； time constraint

參考文獻

[51] 戚志揚，「半導體製造在製品存貨動態分配及控制方法」，國立清華大學工業工程與管理學系碩士論文，民國九十五年。

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