透過您的圖書館登入
IP:3.144.248.24
  • 學位論文

微波退火對矽材料電性變化之研究

The Effect of Microwave Annealing on the Electrical Properties of Silicon

指導教授 : 李三保

摘要


隨著電晶體元件縮小,閘極長度也將跟著變短,這讓電晶體元件的操作速度越來越快。然而當閘極長度縮短到一定程度之後,短通道效應也開始產生作用,這會讓我們無法利用調整閘極電壓的方式來控制電晶體元件的啟動與關閉。然而傳統的快速退火製程已逐漸無法應付更淺的元件接面深度要求。因此我們利用微波爐針對利用離子佈植植入不同雜質原子的單晶矽和多晶矽來進行活化退火的熱處理。並且利用四點探針、二次離子質譜儀來分析退火後材料的片電阻和接面深度以及使用穿透式電子顯微鏡來了解表面再結晶的情形。我們發現在適當的微波時間和微波瓦數下能得到較低的片電阻值以及淺的接面深度。

參考文獻


1. F. L. Yang, D. H. Lee, H. Y. Chen, C. C. Chang, S. D. Liu, C.C. Hung, T. X. Chung, H. W. Chen, C. C. Huang, Y. H. Liu, C. C. Wu, C. C. Chen, S.C. Chen, Y. T. Chen, Y. H. Chen, C. J. Chen, B. W. Chan, P. F. Hsu, J. H. Shieh, H. J. Tao, Y. C. Yeo, Y. Li, J. W. Lee, P. Chen, M. S. Liang and C. Hu: 5nm-Gate Nanowire FinFET, 2004 Symposium on VLSI Technology, Digest of Technical Papers, pp.196-197 (2004)
2. T. Krishnamohan, D. Kim, S. Raghunathan and K. Saraswat: Double-Gate Strained-Ge Heterostructure Tunneling FET(TFET) With Record High Drive Currents and <60mV/dec Subthreshold slope, IEEE International Electron Devices Meeting 2008, Technical Digest, pp.947-949 (2008)
3. Y. Taur, E. J. Nowak: CMOS devices below 0.1 mu m: How high will performance go?, IEEE International Electron Devices Meeting 1997, Technical Digest, pp.215-218 (1997)
4. Majumdar, Z. Ren, J. W. Sleight, D. DoBuzinsky, J. R. Holt, R. Veingalla, S. J. Koester and W. Haensch: High-Performance Undoped-Body 8-nm-Thin SOI Field-Effect Transistor, IEEE Electron Device Letters, Vol. 29, pp.515-517 (2008)
5. A. Shima, T. Mine, K. Torii and A. Hiraiwa: Enhancement of Drain Current in Planar MOSFETs by Dopant Profile Engineering Using Nonmelt Laser Spike Annealing, IEEE Transactions on Electron Devices, Vol. 54, pp.2953-2959 (2007)

延伸閱讀