隨著半導體元件尺寸逐漸微小化,我們將遭遇到量子效應所帶來的嚴重瓶頸。因此新穎高介電常數氧化物[例如氧化鎵(氧化釓)]將扮演著如何繼續將元件製作推向一個嶄新歷程的重要角色。當我們在製作這些新穎材料,第一個所遇到的問題即是其元件組成上的穩定性及可靠性,這些問題往往都來自於半導體的異質介面品質與特性,此時具有高度介面靈敏度的二倍頻 (二次諧波) 技術即是一個合適探討此種表面物理問題的適當工具。 本論文研究高介電常數氧化物與半導體的異質介面中介面態和氧化層缺陷對半導體表面能帶曲折的影響。我們藉由分析場致二倍頻的大小來觀測半導體表面能帶受曲折的程度。研究發現樣品經由熱處理之後,場致二倍頻強度將減小,意味介面態及氧化層的缺陷密度已經大量的減少。 更進一步我們進行了外加偏壓的二倍頻實驗,探討介面態於半導體能隙間的分布情形。藉由外加偏壓操控表面能帶曲折程度,同時量測二倍頻隨著不同偏壓的訊號強度,我們發現二倍頻訊號在形成電子(電洞)空乏區條件的電壓範圍(depletion regime)有明顯的變化。實驗分析結果推得金氧半導體(鉻/氧化鉿/矽)電容的平帶電壓大約在 -0.3V左右。在未來進一步的分析上,將用偏壓二倍頻的實驗結果與電性量測的結果來做比較而進一步推算矽(鍺)金氧半導體電容的介面態密度以及精確的平帶電壓大小。
As the scaling of the silicon metal-oxide-semiconductor (MOS) transistor approaches the fundamental limit due to the quantum tunneling effect, the innovative high-k oxide, e.g. Ga2O3(Gd2O3)[GGO], plays an important role to continue the historic progress in microelectronic devices. Since the reliability and stability of semiconductor devices are intimately related to their surface conditions, second harmonic generation (SHG) can be a suitable technique to explore the physical properties of the surface or buried interface due to its surface and interface sensitivity. In this thesis we carried out a comprehensive study to reveal the initial band bending of semiconductor due to the existence of interfacial traps at the heterointerface between the high-k dielectric and the semiconductor bulk. We also propose to investigate the initial band-banding by analyzing the electric field-induced SHG (EFISHG). Azimuthal rotational-angle SHG (ARSHG) measurement reveals that the EFISH response can be suppressed by the reduction of oxide and interfacial traps via the post deposition treatments. Furthermore, we developed a new approach, so called the bias-dependent ARSHG measurement, to investigate the interfacial-state density (Dit) of Cr/HfO2/Si MOS structure. By varying the bias voltage, the surface band-bending is modified and the EFISH changes dramatically in the heterointerface. The analysis of the experimental result reveals the flat band condition at -0.3V in the Cr/HfO2/Si MOS capacitor. In the future work, along with a comparison to the electrical characteristics, can provide an effective way to extract the quantity of interfacial electronic states and flat-band voltage for the Si- and Ge-based MOS devices.