- 學位論文
高亮度發光二極體製程模擬與可靠度提昇之研究
Fabrication Process Modeling and Reliability Improvement of High-Brightness LEDs
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摘要
為了提升磷化鋁銦鎵發光二極體 (AlGaInP LED) 之發光效能與散熱特性，使用晶圓接合技術將原本低導熱與具吸光性質的砷化鎵基板取代為其他高散熱特性基材已經被廣泛運用在高效能發光二極體的研究與開發上。然而，在上述製造過程中，因各層材料間的熱膨脹係數不匹配與製程溫度上的差異，極可能造不同堆疊層內部產生相當高的殘餘應力，使得磊晶層與各堆疊層因承受高應力而產生破裂行為，或各堆疊層間因接合強度的不足而產生結構間的脫層，進而影響晶片之可靠度並降低生產良率。因此，本研究先透不同的薄膜應力估算公式了解薄膜結構與基板間的力學行為，並進一步透過有限單元分析(Finite Element Analysis, FEA)來確認各估算公式的適用性範圍。由分析結果得知，當結構變形量仍坐落在小變形的範圍時，各個薄膜應力估算公式皆可有效的預估其應力值。雖然上述預估公式可以初步的了解並計算單層薄膜沉積後的力學模式，但針對多層膜沉積、蝕刻與異質機材接合等對多層堆疊結構所產生的力學行為變化則無法預估。因此，本研究提出一有限單元模擬方法，結合了製程模擬(process modeling)、接合接觸法(bonding contact technique)與改良型虛擬裂縫閉合法(modified virtual crack closure technique)，以完整了解在LED製作過程中因材料堆疊、晶片接合、基板置換與外加溫度負載時對於主要結構層的應力變化情形，進一步的找出因晶片界層破裂行為所引發出的產品失效與可靠度不佳的主因。 在透過諸多分析實驗來驗證上述各個模擬方法後，本研究進一步針對開發中的高亮度磷化鋁銦鎵發光二極體結構進行有限單元模擬分析。分析結果指出各堆疊層的集中應力皆發生在具有結構階梯覆蓋處，其最高值亦出現在最後高溫快速退火製程中。這樣的高應力值相當有可能造成LED結構中的脆性材料破裂與堆疊層間的脫層行為。而從參數化結果發現，若要有效降低在階梯覆蓋處之應力集中，最佳的方式就是將其完全消除。基於這樣的設計概念，本研究亦透過模擬分析與試片製作來進行交互驗證。因此，本研究所提出的模擬分析方式將可運用在各類相關半導體結構的設計開發上，作為消除堆疊結構製作過程可能的破壞行為與提升其製程良率的設計準則。
並列摘要
The wafer bonding technique was applied in this paper to enhance the light extraction efficiency and thermal performance of AlGaInP light-emitting diodes (LEDs). This technique can replace the GaAs substrate with other high thermal conductivity substrates. However, it can make the film crack either during the removal etching process of the GaAs substrate or the annealing process after the GaAs’ removal. Therefore, this crack problem is an important reliability/yield issue of high-brightness LEDs during their manufacturing process. The material properties of a film and substrate, such as Young’s modulus, lattice parameters, and CTE, vary. Residual stress can also build up during fabrication and processing. Therefore, the resultant stresses inside the film and substrate can be different as well and cause a deflection of the composite structure to increase or relax stress. Therefore, the workability of theories used to calculate thermal stresses in thin films are first discussed and examined using finite element analysis (FEA). When the substrate curvature is in a small deformation range, the prediction results of the in-plane stress of a film by using these equations are similar to the trend exhibited by FEA. However, the detailed stress distributions change with each process. Deposition, etching, and wafer bonding within a material cannot be determined using these multilayer theories. Hence, this research proposes a novel simulation method that combines process modelling, bonding contact technique and the modified virtual crack closure technique (MVCCT) to understand the mechanical behavior of high-brightness AlGaInP LEDs during the fabrication process. After validating the above simulation techniques through several simple experiments, the simplified 2D finite element model of a multilayer LED structure is established and examined. According to the simulation results, the concentrated stress occurs near the step coverage range, and this stress is increased significantly when the structural and loading temperature is raised to a high level. These highly concentrated stresses may induce cracks in the brittle layers and weak interface. The results of the parametric study also provide a design guideline to reduce the concentrated stresses. If the step coverage range can be removed, the above concentrated stresses produced by the geometry effect can be eliminated. The foregoing design guideline is also validated and examined using FEA and test samples fabrication, respectively. Overall, the proposed methodologies in this research can be used to help eliminate crack problems and enhance the reliability of fabrication for semiconductor manufacture.
參考文獻
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