低溫複晶矽薄膜電晶體中光汲極漏電流抑制方法之研究

近幾年來，因為低溫複晶矽薄膜電晶體特性優異，常應用在玻璃基板上的高速電路元件。由於高遷移率和操作穩定，低溫複晶矽薄膜電晶體已被廣泛用於小型至中型的顯示面板。在面板的應用上，低溫複晶矽薄膜電晶體會曝露在相當強烈背光源從背面或周遭環境來的光。在強光的照射下，會產生極大的光漏流。高汲極光漏流不僅會增加備用時的電源，亦可能導致操作上的錯誤以及降低顯示器的明暗比。若採用一個下閘極當作遮蔽閘以消除光漏流，卻會引發drain turn on的效應，導致通道的漏流因高汲極電壓而提高。在本篇論文中提出了單閘極的不對稱和環閘結構的遮蔽閘，可以達成光遮蔽亦可以有效減輕drain turn on的效應，另外還有偶閘極和雙閘極等設計，也都可以LTPS TFT同時展現低漏流及drain turn-on的特性。

關鍵字

低溫複晶矽薄膜電晶體；光漏流；下閘極

並列摘要

The performance level and reliability of low temperature polycrystalline silicon thin-film transistors (LTPS TFTs) have greatly improve in recent years as a result of intensive research for the integration of high speed circuits on glass substrates (SOP). With their high mobility and operation stability, LTPS-TFTs have been used extensively in small-to-medium display panels. In display applications, LTPS TFTs are exposed to fairly strong backlight from the back plane and/or ambient light. Under illumination, photon-induced carrier generation on the poly-Si body can induce large off-state leakage current, much higher than that in a dark environment. High off-state leakage current in these TFTs not only lead to increased standby power, but also cause operation errors as well as degradations in display quality. The introduction of a bottom shielding gate is expected to eliminate photo-induced leakage effectively. However, the subsequent additional drain turn-on effect can become problematic for the TFT driving circuits. In this study, we investigate the design of the bottom shielding gate to optimize the off-state drain leakage current suppression as well as minimizing the drain turn-on effect. Asymmetric shielding gates and surround structures are found to be a promising solution to alleviate the drain turn-on problem. Dual and double gate designs are also effective and reliable methods to minimize the off-state photo leakage current without enhancing the drain turn on effect.

並列關鍵字

LTPS TFT ； photo leakage current ； bottom gate

參考文獻

[1] S.D. Brotherton, “Polystalline silicon thin film transistors,” Semicond. Sci. Technol., vol.10, NO.6, pp. 721-738, JUNE 1995.

[2] Sang-Hoon Jung, Woo-Jin Nam, and Min-Koo Han, “A new voltage-modulated AMOLED pixel design compensating for threshold voltage variation in poly-Si TFTs,” IEEE Electron Device Lett., vol.25., NO.10., Oct. 2004, pp. 690-692.

[3] Jung-Hoon Oh, Hoon-Ju Chung, Nae-In Lee, and Chul-Hi Han, “A high-endurance low-temperature polysilicon thin-film transistor EEPROM cell,” IEEE Electron Device Lett.,vol.21.,NO.6.,JUNE 2000, pp. 304.

[6] S. Martin, J. Kanicki, N. Szydle, A. Rolland, Active Matrix Liquid Crystal Display'97 (1997) 211.

[7] J. H. Choi, C. S. Kim, B. C. Lim, and J. Jang, “A novel thin film transistor using double amorphous silicon active layer,” IEEE Trans. Electron Devices 45 (1998) 2074.

國際替代計量

低溫複晶矽薄膜電晶體中光汲極漏電流抑制方法之研究

全文下載

主題瀏覽