Oxide Scalability Characteristics in MBE grown Al2O3/Ga2O3(Gd2O3)/In0.2Ga0.8As/GaAs MOS Capacitors and ALD-Al2O3/In0.2Ga0.8As/GaAs MOSFET : ALD Growth, Processing, and Characteristics

以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究

徐堃豪(Kuen-Hao Shiu)

指導教授 ： 洪銘輝 ； 郭瑞年

國立清華大學/工學院/材料科學工程學系/碩士(2008年)

https://doi.org/10.6843/NTHU.2008.00471

摘要

(I)氧化層微縮之特性研究
藉由以分子束磊晶技術臨場成長3奈米氧化鋁保護層於氧化鎵(氧化釓)/砷化銦鎵/砷化鎵之異質結構上，已首次使此電容結構之氧化層成功地微縮至等效氧化層厚度約1奈米。
伴隨於氮氣下之800-850oC快速高溫熱退火，此新穎異質結構呈現極佳的電性與結構特性。此外，在此高溫退火條件下，氧化鋁/氧化鎵(氧化釓)(33,20,10,8.5,4.5 奈米)/砷化銦鎵/砷化鎵金氧半電容結構，除了雙閘極氧化物堆疊依舊維持非晶態外，輪廓鮮明如原子級般平滑之氧化物/半導體界面及完全晶格伸張無鬆緩現象之砷化銦鎵/砷化鎵界面亦伴隨維持。
金氧半二極體良好的電容-電壓曲線已表現於空乏和積聚區之間的陡峭轉移，伴隨有小的平帶電壓(金金屬閘極為1.1V而鋁則為0.1V)、10-500千赫茲間，微小的積聚電容值頻率分散(1.5%–5.4%)以及100千赫茲下，二分之一積聚電容值處，小的遲滯值(116-170 mV)。
至於在照光與擬穩態量測條件下，電容-電壓曲線中所觀察到的少數載子反轉行為已明確地證實了氧化鎵(氧化釓)鈍化法於防止砷化銦鎵表面費米能階札釘之有效性。
同時，平帶電壓加1V處之低漏電流密度(3奈米氧化鋁/氧化鎵(氧化釓)(4.5和大於等於8.5奈米)個別為3.1×10−5 A/cm2及 (10−8-10−9 A/cm2))、不隨氧化層微縮而降低之高介電常數值14-16，以及1011 cm−2 eV−1之低界面能態密度值亦已被成功達成。

關鍵字：分子束磊晶、高介電常數閘極介電質、三五族化合物半導體、金屬氧化物半導體、氧化層微縮、氧化鎵(氧化釓)、氧化鋁、砷化銦鎵、快速熱退火

(II)金氧半場效電晶體之製程與特性研究
藉由使用環形-閘極製程技術與原子層化學氣相沉積技術成長4.5奈米氧化鋁作為元件結構中之閘極介電質，特性表現良好之空乏型、n型通道砷化銦鎵/砷化鎵金屬氧化物半導體場效電晶體已被成功地實現，伴隨於閘極長度8 □m、閘極寬度200 □m的元件中，展示出最大汲極電流33 mA/mm (於閘極電壓2.5 V和汲極電壓3 V處)以及最大轉移電導16 mS/mm (於閘極電壓-0.2 V和汲極電壓2.5 V處)之特性。
氮化鈦與金/鈦則個別由於合適的熱穩定性與功函數值考量，先後被選擇應用於此類元件的金屬閘極及整體製程中。此元件性能之展示亦首次成功地將我們的原子層化學氣相沉積技術成長氧化鋁/砷化銦鎵/砷化鎵材料系統進一步延伸至真實的金氧半場效電晶體元件上。
同時，環形-閘極製程技術之實際應用已被成功建立，作為一種可快速檢測高介電常數閘極介電質/三五族化合物半導體材料系統的方式。這些優勢主要建□於環形-閘極製程之製程簡化性、便利性以及可進一步具體化展示出金氧半場效電晶體元件之操作性能。其中，環形-閘極製程主要由閘極金屬與源極/汲極接點金屬沉積兩步驟所組成，省去藉由離子佈值技術以達元件間隔離絕緣之步驟，而僅由環形元件之架構來提供相同功用，因而使得整體製程的複雜度及時間大幅減小。
此外，於具有4.5奈米氧化鋁為閘極氧化層之元件(閘極長度8 □m)中，已被達成的極低閘極漏電流密度約8.06×10-9 A/cm2 於1 MV/cm處亦象徵著原子層化學氣相沉積成長之氧化鋁應用於電晶體微縮中的一大優勢。

關鍵字：金氧半場效電晶體、原子層化學氣相沉積、高介電常數閘極介電質、金屬閘極、三五族化合物半導體、氧化鋁、砷化銦鎵、砷化鎵

關鍵字

高介電常數閘極介電質 ； 三五族化合物半導體 ； 金氧半場效電晶體,金屬氧化物半導體 ； 氧化鎵(氧化釓),氧化鋁,砷化銦鎵,砷化鎵 ； 原子層化學氣相沉積 ； 分子束磊晶

並列摘要

Part (I): Oxide Scalability
An equivalent oxide thickness about 1 nm for molecular beam epitaxy (MBE)-grown Ga2O3(Gd2O3) (GGO) on In0.2Ga0.8As has been achieved by employing a thin in situ deposited 3 nm thick Al2O3 protection layer. The novel hetero-structures are robust electrically and structurally with rapid thermal annealing (RTA) to high temperatures of 800-850°C under N2 flow. Furthermore, the dual gate oxide stacks of the Al2O3/GGO (33, 20, 10, 8.5, and 4.5 nm)/In0.2Ga0.8As/GaAs metal-oxide-semiconductor (MOS) capacitors remain amorphous after RTA up to 800-850°C, accompanied with atomically sharp smooth oxide/semiconductor interfaces and fully strained In0.2Ga0.8As/GaAs interface without lattice relaxation. Well behaved capacitance-voltage (C-V) curves of the MOS diodes have shown sharp transition from depletion to accumulation with small flatband voltage (1.1 V for Au metal gate and 0.1 V for Al), weak frequency dispersion (1.5%–5.4%) between 10 and 500 kHz at accumulation capacitance, and small hysteresis (116-170 mV) at half accumulation capacitance of 100 kHz. The observed inversion formation in the C-V characteristics under light illumination or quasi-static mode explicitly confirmed that the Fermi level is effectively unpinned by the GGO passivation approach. Low leakage current densities (3.1×10−5 and (10−8-10−9) A/cm2 at V=Vfb+1 V for Al2O3(3 nm)/GGO(4.5 and ≧8.5 nm), a high dielectric constant around 14-16 of GGO for all tested thicknesses, and a low interfacial density of states (Dit) in the low 1011 cm−2 eV−1 have also been accomplished.
Keywords: molecular beam epitaxy, high-□ gate dielectric, III-V, MOS, oxide scaling, Ga2O3(Gd2O3), Al2O3, InGaAs, RTA.

Part (II): GaAs-based MOSFET
Well-behaved electrical characteristics of D-mode n-channel In0.2GaA0.8/GaAs MOSFETs with 4.5 nm thick atomic layer deposition (ALD)-grown Al2O3 as gate dielectric by using ring-gate process have been demonstrated, achieving a drain current of 33 mA/mm (at Vg=2.5V and Vd=3V), and a transconductance of 16 mS/mm (at Vg=-0.2V and Vd=2.5V) with a 8 □m-gate-length and a 200 □m-gate-width. TiN and Au/Ti were chosen as metal gates during device fabrication due to the suitable thermal stability and workfunction respectively. This demonstration also successfully extends our ALD-Al2O3/In0.2GaA0.8/GaAs material system to a realized MOSFETs device for the first time. The application of ring-gate process was established as a feasible approach to rapidly examine/calibrate the high □/III-V materials systems due to its simplicity in processing steps, consisting of gate metal and S/D contact metal formations without isolation step, and further enable to embody the MOSFETs operation. Furthermore, the nm-thin oxide layer (4.5 nm Al2O3) with extremely low gate leakage current densities around 8.06×10-9 A/cm2 at 1 MV/cm from a 8 □m-gate-length device have also been achieved, that symbols one of the key capabilities of ALD-Al2O3 in downsizing field-effect transistors.
Keywords: MOSFET, atomic layer deposition, high-□ gate dielectric, metal gate, III-V, Al2O3, InGaAs, GaAs

並列關鍵字

high-k gate dielectric ； III-V compound semiconductor ； MOSFET,MOSCAP ； Ga2O3(Gd2O3), Al2O3, InGaAs,GaAs ； atomic layer deposition (ALD) ； molecular beam epitaxy (MBE)

參考文獻

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