矽鍺BiCMOS製程中整合類比數位轉換器之影像感測電路設計

The Design of Image sensor integrated with A/D converter in SiGe BiCMOS Technology

何昆展(Kun-Chan Ho)

指導教授 ： 徐永珍

國立清華大學/電機資訊學院/電子工程研究所/碩士(2012年)

摘要

本研究之目的在於將實驗室高效能的像素架構、類比數位轉換器以及週邊電路整合於同一晶片中，以降低雜訊與節省晶片面積，使其能方便應用於多功能消費性電子產品中。本研究使用標準的TSMC 0.18μm SiGe BiCMOS標準製程，在Full HD的規格下，嘗試實現具有30frame/s的畫面更新率、高動態偵測範圍的單晶片攝像系統。
在類比數位轉換器方面，因考量未來對於高畫素的需求，影像感測器使用行並列的輸出方式，故使用高線性度、架構簡單且低功率損耗的單斜率架構，做為每一行的類比數位轉換器，設計解析度為十位元，取樣頻率為50kHz，每一行的功率損耗小於150uW。

關鍵字

影像感測器 ； 類比數位轉換器

並列摘要

The purpose of this research is to integrate a high-performance pixel architecture which designed by our laboratory, an analog to digital converter (ADC) and peripheral circuits in chip. It can reduce noise, save chip area, and easily be applied to the multi-function consumer electronics. Therefore, this study will design a front-end circuit for a Full HD camera-on-chip system with 30 frames per second, wide sensing dynamic range in standard TSMC 0.18μm SiGe BiCMOS technology.
Considering the demand of higher pixel resolution in the future, this paper presents a CMOS imager with column-level ADC. The implemented ADC uses a single-slope architecture which features high linearity, simple structure and low power consumption. Design of resolution is 10bit, sampling rate is 50kHz, and power consumption is less than 150uW for each column.

並列關鍵字

Image Sensor ； A/D Converter

參考文獻

[1] M. Bigas, E. Cabruja, J. Forest, J. Salvi, “Review of CMOS image sensors”, Microelectronics Journal 37 (2006) 433–451.

[2] Abbas El Gamal and Helmy Eltoukhy, “CMOS IMAGE SENSORS”, IEEE Circuits Devices Mag., pp. 6-20, May June 2005.

[3] Eric R. Fossum, “CMOS Image Sensors: Electronic Camera On A Chip”, IEEE Trans. Electron Devices, VOL. 44, NO. 10, pp. 1689-1698, OCTOBER 1997.

Response CMOS Image Sensor With High Output Voltage Swing and In-Pixel

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