低功率鍺氧化物基非揮發性電阻式記憶體之研究

Investigation of Low Power Germanium-Oxide-Based Non-Volatile Resistive Random Access Memory

鄭淳護(Chun-Hu Cheng)

指導教授 ： 葉鳳生 ； 荊鳳德

國立清華大學/電機資訊學院/電子工程研究所/博士(2012年)

https://doi.org/10.6843/NTHU.2012.00571

摘要

近年來，隨著記憶體元件的不斷微縮，電荷缺陷儲存式快閃記憶體(CTF NVM)元件的耐久性和資料保存能力已面臨挑戰。具備三維整合能力的新型電阻式隨機存取記憶體已被視為最具發展潛力的下一世代非揮發式記憶體，然而，過大的通道形成導通電壓、高操作電流、阻態切換穩定性差，以及不良的週期耐久性仍是目前遭遇的議題。本論文將以鍺氧化物材料(GeOx)的電阻切換特性為研究主軸，整合多種金屬氧化物，材料包含氮氧化鉿(HfON)、氮氧化鉭(TaON)、二氧化鈦(TiO2)、以及鈦酸鍶氧化物(SrTiO)等，以形成雙層以上堆疊結構，並同步進行材料物性和化性分析，進而實現一系列低功率且高速操作的電阻式記憶體元件。此系列低功率電阻式記憶體具有大的電阻值比(HRS/LRS ratio)、良好的資料保存能力、100 ns以下的操作速度，和10萬次以上週期耐久性。經由我們初步研究結果證實，這些低功率電阻式記憶體元件，其阻態切換電流的降低和自我限流功能(self-compliance)，是由躍遷傳導機制(hopping conduction)所主導。然而，由於阻態切換機制複雜，對於多層堆疊結構的電阻式記憶體而言，相對應的傳導機制仍有待更多研究來釐清。
本論文首先探討雙層式鍺氧化物/鈦酸鍶(GeO/STO)電阻式記憶體，由研究結果可知，此元件操作所需的設置(set)功率為4 uW，重置(reset)功率僅16 pW，且同時具備高速操作能力(50 ns)、良好的資料保存能力(85C)，以及十萬次的重覆讀寫次數等。然而，為了更進一步降低操作電流以及改善鈦酸鍶氧空缺層的穩定性，我們使用氮氧化鉿取代窄能帶鈦酸鍶氧化物。此雙層式鍺氧化物/氮氧化鉿(GeO/HfON)電阻式記憶體元件除了展示1 W以下的低操作功率，以及8 fJ的阻態切換能量外，更擁有較佳的高溫資料保存能力(125C)。此外，這高性能的雙層式鍺氧化物/氮氧化鉿(GeO/HfON)電阻式記憶體架構也成功的以低溫製程技術，製作於軟性基板(聚亞醯胺基板)上。此可撓式電阻式記憶體元件，可在50 ns速度下操作，設置功率為4.8 uW，重置功率更降低至1 nW，是目前發表之可撓性電阻式記憶體元件中，操作功率最低的，且該元件讀寫操作次數更可達到上萬次。另外，為了改善元件的阻態切換穩定性和週期耐久性等特性，我們開發了三層式電阻式記憶體，藉由鍺氧化物、奈米結晶相二氧化鈦和氮氧化鉭三種材料的相互結合，成功實現了一個超長週期耐久性的高速電阻式記憶體元件。此三層堆疊型電阻式記憶體元件的操作能量僅需0.7 pJ，且具備10 ns高速阻態切換能力、自我限流功能的低阻態切換電流(~uA)，以及優異高低阻態切換穩定度(excellent switching uniformity)。另外值得注意的是，元件讀寫次數已由原本的十的六次方，提升至十的十次方次。此新型低功率電阻式記憶體元件，與現行快閃記憶體元件的耐久性相比較下，讀寫次數高了五個數量級。

關鍵字

電阻式隨機存取記憶體 ； 氧化鍺 ； 非揮發性記憶體

並列摘要

Although novel resistive random access memory (RRAM) with 3D integration shows high potential for down scaling beyond charge-trapping flash (CTF) nonvolatile memory (NVM) at sub-25 nm nodes, the large forming voltage, high set/reset currents, poor switching uniformity and low cycling endurance are other challenges. In this dissertation, it is demonstrated ultra-low power nonvolatile RRAM devices with superior memory characteristics can be achieved by using stacked metal-insulator-metal (MIM) structures with covalent-bond germanium oxide (GeOx) and oxygen-deficient metal oxides (e.g., HfON, TaON, SrTiO3, TiO2).
These low-power RRAM devices show excellent resistance switching characteristics such as large high- to low-resistance state (HRS/LRS) ratio of >100X, good data retention, fast speed of <100 ns and cycling endurance of >10^6 cycles. Our studies reveal that hopping conduction mechanism in LRS provides a large internal resistance to reach low self-compliance switching set/reset currents. Using novel stacked GeOx on metal-oxide SrTiO3 to form the cost-effective Ni/GeO/SrTiO/TaN resistive switching memory, low set power of small 4 uW, reset power of 16 pW, good data retention at 85C, fast 50 ns switching time and good 106 cycling endurance are realized. Another technique used for further saving power is to employ HfON to replace of narrow-bandgap SrTiO3, which can lower set power to sub-uW and reach ultra-low 8 fJ switching energy. The improved 125C retention than previous GeOx/SrTiO3 RRAM can be ascribed to higher activation energy to maintain stable resistance state under high-temperature retention test.
Furthermore, the high performance GeOx/HfON RRAM has been demonstrated on low-cost Polyimide substrate. Only very low set poer of 4.8 uW and reset power of 1 nW are needed to reach bi-stable resistance state, which lead to a large memory window with HRS/LRS ratio of 9x10^2. Also, good retention of 85C for 10^4 sec and excellent endurance of 10^5 cycles at a fast 50 ns are obtained simutaneously. To further imporve switching stability and cycling endurance, we propose a tri-layer RRAM using nano-crystal TiO2 and TaON buffer layer, the Ni/GeOx/nc-TiO2/TaON/TaN RRAM shows the self-compliance set/reset currents, low 0.7-pJ switching energy, narrow current distribution and long 10^10 cycling endurance. Such long endurance is 5 orders of magnitude higher than the existing Flash memory at the close sub-pJ switching energy.

並列關鍵字

resistive Random Access Memory ； germanium oxide ； non-volatile memory

參考文獻

Chapter 1:

[1.1] International Technology Roadmap for Semiconductors (ITRS), 2010. [Online]. Available: www.itrs.net

[1.2] S. H. Lin, Albert Chin, F. S. Yeh, and S. P. McAlister, “Good 150oC retention and fast erase charge-trapping-engineered memory with scaled Si3N4,” in IEDM Tech. Dig., 2008, pp. 843-846.

[1.3] C. H. Lai, Albert Chin, H. L. Kao, K. M. Chen, M. Hong, J. Kwo and C. C. Chi, “Very Low Voltage SiO2/HfON/HfAlO/TaN Memory with Fast Speed and Good Retention,” in Symp. on VLSI Tech. Dig., 2006, pp. 54-55.

[1.4] U. Russo, D. Ielmini, C. Cagli, A. L. Lacaita, S. Spiga, C. Wiemer, M. Perego, and M. Fanciulli, “Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAM,” in IEDM Tech. Dig., 2007, pp. 775-778.