Hung, T. P. (2009). 高介電係數材料、堆疊式結構與高功函數金屬閘極應用於電荷陷阱式快閃記憶體元件之研究 [doctoral dissertation, National Tsing Hua University]. Airiti Library. https://doi.org/10.6843/NTHU.2009.00010
Pang, H. C. (2015). 鍺掩埋通道與低溫沉積堆疊電荷捕捉層在多晶矽奈米線通道之快閃記憶體元件特性研究 [master's thesis, National Tsing Hua University]. Airiti Library. https://www.airitilibrary.com/Article/Detail?DocID=U0016-0312201510272340