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  • 學位論文

TILE64多核平台上之主從式架構

Master–Worker Paradigm on the TILE64 Many-core Platform

指導教授 : 鍾葉青
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摘要


進年來隨著電腦硬體及晶片網路網路技術的快速發展,多核架構處理器已漸漸量產與普及。然而多核架構普及的同時也一併給程式設計人員帶來了新的挑戰,即: 建造高速且效能可隨使用處理器核心數量增長的應用程式。在一個多核平台上面對應用程式做最佳化是個多面向的問題,因為硬體架構與軟體架構都必須被同時考量與搭配。在本論文中,我們將藉由在TILE64多核平台上面建立與評量平行程式之模型以探討此問題。我們以串流處理程式以及MapReduce為目標程式並且選用主從式架構為平行化模型。我們對於在TILE64多核平台上面平行運作的主從式串流處理應用程式進行塑模。我們共塑模了九種通訊方法及其效能理論分析,同時也實際測試了實作出來的程式並與理論分析相互比較。實驗結果顯示我們提出的模型可以幫助指引程式設計人員在TILE64上選擇較佳的方法來實作主從式架構之應用程式。

並列摘要


Advances at an unprecedented rate in computer hardware and networking technologies have made the many-core computing affordable and readily available in a matter of few years. Nonetheless, it incurs challenges to pro-grammers to build scalable and high performance parallel software. Optimi-zations of parallel programs for a many-core platform are viewed as a multi-faceted problem, where system and architectural factors should be taken into account. In this dissertation, we tackle this problem by modeling and evalu-ating parallel application behavior on the TILE64 many-core platform. We choose both stream processing application and MapReduce as target applica-tions and master–worker model as a parallelization paradigm. We model the parallel execution of master–worker applications on the TILE64 many-core platform. We model nine different communication schemes for a master–worker system. We also propose performance modeling for the nine commu-nication schemes. We run program implementations to compare and verify theoretical and experimental results. The results show that the proposed model is capable of guiding software developers in choosing proper imple-mentation methodology for master–worker processing on the TILE64 many-core platform.

參考文獻


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