應用於多通道快閃記憶體之有條件閾值平均磨損演算法

近年來NAND型快閃記憶體已成為一種被廣泛使用的儲存媒體，然而它有耐用度上得問題。每個NAND型快閃記憶體的區塊都有有限的磨耗次數。當一區塊超過1萬至10萬次的磨耗之後，抹除錯誤會開始發生，也就是該區塊有可能無法被正確地寫入與抹除，這是目前NAND型快閃記憶體必然會面臨的問題。若檔案系統沒有針對這個部份加以處理，會發生記憶體區塊抹除數不平均的情況，造成某些區塊較早發生抹除錯誤，間接縮短了快閃記憶體的壽命。平均磨損是一種將抹除動作平均分散到各個區塊的技術，避免部份區塊被過度使用，以延長使用壽命。而固態硬碟是由數片NAND型快閃記憶體晶片組成，目標是取代傳統的磁碟式硬碟。為了提昇效能，有些支援多通道的控制器已經被提出，這些通道可以同時分別控制不同的晶片。我們考慮這點，對所提出的演算法做出一些修改。在此論文中，我們提出了一個適用於多通道快閃記憶體的有條件閾值平均磨損演算法。此演算法的基本原則是追蹤各區塊抹除數並做調整。針對多通道，一個平均磨損的動作被分成數個子動作並分配到不同的通道上，這幾個子動作同時執行，可以減少執行單一個平均磨損動作所需要的時間。而有條件閾值的概念則是讓閾值隨著平均磨耗次數增加而減少，這能讓快閃記憶體在還很新的時候，不用做太多的平均磨損動作造成多餘的抹除，但是又會隨著快閃記憶體的老化，閾值會逐漸變小，使平均磨損運作得更頻繁，以達到延長整個記憶體使用壽命的作用。

關鍵字

平均磨損演算法；快閃記憶體；多通道

並列摘要

Recently, NAND flash memory has become a widely used data storage media. However, it has the endurance problem that each NAND flash block has limited erase cycles. Erase failure usually first occurs over 10K-100K erase cycles. This is inherent endurance characteristic of NAND flash, and in multi-level cell (MLC) NAND flash, this problem is more serious. Wear-leveling is a technique that distributes erase operations evenly to all blocks to extend the lifetime of a flash memory. NAND flash-based solid-state drive (NSSD) is composed of several NAND flash memory chips. To improve the performance, some multi-channel NSSD controllers have been proposed. These channels can operate parallelly and control different chips. In this thesis, a conditional threshold wear-leveling algorithm fitting multi-channel architectur is proposed. The overall wear-leveling operation is separated into several suboperations, and these sub-operations are distributed to different channels. This reduces the runtime of the wear-leveling operation. The conditional threshold value decreases when the average erase cycle increases. This can reduce extra erase operations cause by wear-leveling when the flash memory is young. As the flash memory becomes older, the smaller threshold makes wear-leveling work more frequently to get better performance.

並列關鍵字

wear-leveling ； NAND flash ； multi-channel

參考文獻

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Embedded Technology and Applications Symposium (RTAS’02), Sep. 25–27, 2002, p. 187.

[12] J.W. Park, G. H. Park, C.Weems, and S. D. Kim, “Sub-grouped superblock management for high-performance flash storages,” IEICE Electronics Express, vol. 6, no. 6, p. 297, Mar. 2009.

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應用於多通道快閃記憶體之有條件閾值平均磨損演算法

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