基於相變化儲存裝置之多精細度區塊管理機制以最佳化檔案系統空間利用率

Multi-grained Block Management to Optimize the Space Efficiency of File Systems on PCM Storages

陳韻竹(Yun-Jhu Chen)

指導教授 ： 石維寬

國立清華大學/電機資訊學院/資訊工程學系/碩士(2014年)

摘要

相變化記憶體 (Phase-change memory) 為一非常有潛力的儲存媒介,具有高速的讀取效率,配置於行動計算裝置上能夠大為彌補在主記憶體與儲存系統之間存在的效能落差。其雖然作為可能取代快閃記憶體的技術,卻較快閃記憶體價格昂貴,因此如何在記憶體空間上進行有效且節約的利用成為了一個重要的議題。然而現今的檔案系統皆以區塊 (block) 為檔案儲存單位做設計,犧牲了空間利用率以換取效率上的加速,這也使得相變化記憶體在有效利用記憶體空間上遇到了極大障礙。本文將提出一個多精細度檔案區塊管理機制在以相變化記憶體為儲存系統的檔案系統中達到優化其空間利用率。藉由運用相變化記憶體的字節尋址 (byte-addressability) 以及高速讀寫特性,本文也將介紹一種透過動態配置多種不同大小檔案區塊的方法。此方法能適應於不同檔案大小的儲存上,在解決空間碎裂化問題的同時,依然維持最少的額外負擔成本。為了評估上述提出機制與方法所達成的功效,本文也透過一系列實驗做出驗證,實驗結果顯示此機制在檔案系統的空間利用上有極大的增進。

關鍵字

相變化記憶體 ； 空間利用 ； 字節尋址 ； 多檔案區塊大小 ； 空間碎裂化

並列摘要

Phase-change memory (PCM) is a promising candidate as a storage medium to resolve the performance gap between main memory and storage in battery-powered mobile computing systems. However, it is more expensive than flash memory, and thus introduces a more serious storage capacity issue in low-cost solutions. This issue is further exacerbated by the fact that existing file systems are usually designed to trade space utilization for performance over block-oriented storage devices. In this work, we propose a multi-grained block management scheme to optimize the space utilization of file systems over PCM-based storage systems. By utilizing the byte-addressability and fast read/write feature of PCM, a methodology is proposed to dynamically allocate multiple sizes of blocks to fit the size of each file, so as to resolve the space fragmentation issue with minimized space and management overheads. A series of experiments was conducted to evaluate the efficacy of the proposed scheme, and the results show that the proposed scheme could significantly improve the space utilization of file systems.

並列關鍵字

phase-change memory ； space utilization ； byte-addressability ； multiple block size ； space fragmentation

參考文獻

[5] S. Cho and H. Lee. Flip-n-write: A simple deterministic technique to improve pram write performance, energy and endurance. In Microarchitecture, 2009. MICRO-42. 42nd Annual IEEE/ACM International Symposium on, pages 347–357, 2009.

[7] S. Eilert and et al. Phase Change Memory: A new memory enables new memory usage models. In Proc. of the IEEE IMW, 2009.

[9] J. Hu, C. Xue, W.-C. Tseng, Y. He, M. Qiu, and E.-M. Sha. Reducing write activities on non-volatile memories in embedded cmps via data migration and recomputation. In Design Automation Conference (DAC), 2010 47th ACM/IEEE, pages 350–355, 2010.

[10] B. C. Lee, E. Ipek, O. Mutlu, and D. Burger. Architecting Phase Change Memory as a Scalable DRAM Alternative. In Proc. of the IEEE/ACM ISCA, 2009.

[12] E. Lee, S. Yoo, J.-E. Jang, and H. Bahn. Shortcut-JFS: A Write Efficient Journaling File System for Phase Change Memory. In Proc. of the IEEE MSST, 2012.