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  • 學位論文

應用於無鉛銲點之低電阻薄鎳鈀金表面處理技術:界面相變化、接合強度及最佳鎳(磷)層厚度設計

Ultrathin-ENEPIG Surface Finish in Low Impedance Soldering: Metallurgical Reactions, Bonding Strength, and Optimal Ni(P) Thickness Evaluation

指導教授 : 杜正恭

摘要


在覆晶封裝技術(flip chip technology)中,銲點的可靠度扮演著舉足輕重的角色。成功的銲點除了擔負晶片與印刷電路板間的接合外,也需要確保晶片與電路板間的高品質電訊號傳輸。近年來,無電鍍鎳鈀浸金(ENEPIG)被廣泛的應用於電子封裝中的金屬銲墊之表面處理,其製程的穩定性乃至於機械性質上的表現將相當優異。然而,ENEPIG中的非晶態鎳磷層電阻率極高,容易造成接點整體的電阻升高而造成電訊號的延遲和過多的功率耗損,因此,尋找低電阻的表面處理技術變成了相當重要的課題。   本研究嘗試將ENEPIG中的無電鍍鎳磷層減薄至次微米尺度(薄鎳鈀金,Ultrathin-ENEPIG)來改善其電阻過高的問題,無電鍍鎳磷層的厚度為0.05至0.31微米。實驗結果顯示薄鎳鈀金之無電鍍鎳磷層經過第一次回銲後便被消耗完畢,計算結果也證實薄鎳鈀金的電阻值較傳統ENEPIG低了約一個數量級。於是接下來的問題便是,在考量低電阻和機械性質可靠度的情況下,0.05至0.31微米的無電鍍鎳磷層厚度間其最佳的厚度為何。   根據高速剪力撞球測試的結果,薄鎳鈀金在無電鍍鎳磷層厚度為0.18和0.31微米時其機械強度的表現相當優異,然而在經過1000小時的時效熱處理後,0.31微米的薄鎳鈀金由於錫和銅原子對於Ni3P層擴散速率的差異而使的界面產生大量的奈米空孔,進而使的銲點強度快速劣化。反之,0.18微米的薄鎳鈀金由於有較多的Ni3P相與錫反應生成Ni2Sn1+xP1-x相而抑制了奈米空孔的生成,也使的經過長時間的時效反應後期機械強度並沒有太明顯的下降。此外,透過低速剪力疲勞測試顯示,薄鎳鈀金中針狀的介金屬化合物可提供對裂紋額外的幾何強化,也能提高和點抵抗外應利變形的能力。   總結來說,儘管薄鎳鈀金確實保證了銲點的低電阻特性,然而在長時間的使用下其機械強度下降的程度比起傳統ENEPIG要來的明顯。儘管如此,當我們在薄鎳鈀金中選擇0.18微米的無電鍍鎳磷層厚度時,不僅是其電阻值低,在長時間使用後的機械強度穩定性也相當良好。

並列摘要


The continuing thrust toward high-density and high-performance electronic devices has spurred development of more reliable solder joints in flip-chip technology. Successful solder joints not only give rise to metallurgically stable and mechanically robust but also ensure the electrical and signal delivery with excellent quality. Recently, Electroless Ni(P)/Electroless Pd(P)/Immersion Au (ENEPIG) has been widely used as surface finish for metal bond pad because of its many superior comprehensive performances. However, the amorphous electroless Ni(P) layer in ENEPIG dramatically increase the electrical resistance of solder joints and lead to pronounced signal degradation and conductor loss. Thus, it is urgently needed to search for another alternative surface finish which is suitable for low impedance soldering. ENEPIG with ultrathin electroless Ni(P) deposit (ultrathin-ENEPIG) was used to decrease the electrical impedance. The Ni(P) layer in ultrathin-ENEPIG was designed in submicron meter scale (0.05-0.31 µm) and expected to be completely exhausted after the first reflow process. The electrical impedance in ultrathin-ENEPIG was about an order magnitude lower than that in conventional ENEPIG. The next question is that what the optimal Ni(P) thickness is in ultrathin-ENEPIG regarding both the stability of mechanical bonding strength and superior electrical conductivity. In this study, the results of high speed impact test vehicle depicted that ultrathin-ENEPIG with 0.18 and 0.31µm electroless Ni(P) layer performed well owing to their limited growth of interfacial IMC. However, after 1000 hr thermal aging, the bonding strength of ultrathin-ENEPIG with 0.31 µm Ni(P) layer degraded abruptly because of the Kirkendall voids formation resulted from the huge difference in the diffusivity between Cu and Sn. On the other hand, the phase transformation from Ni3P to Ni2Sn1+xP1-x in ultrathin-ENEPIG with 0.18 µm Ni(P) layer eliminated the Kirkendall voids and further avoided the bonding strength degradation after thermal aging. Moreover, the needle-like interfacial IMC was proved to provide interlocking mechanics from fast crack propagation and improved the mechanical performance in the final part of the study. In summary, although ultrathin-ENEPIG indeed provided ultra-low electrical impedance, the mechanical bonding strength may decay faster than conventional ENEPIG. Notwithstanding, it is suggested that 0.18 µm would be the optimal Ni(P) thickness due to its limited growth of interfacial IMC, better bonding strength maintenance after prolonged thermal aging, and interlocking mechanics caused by the needle-like (Cu,Ni)6Sn5 IMC morphology.

參考文獻


4. M. McCormack, S. Jin, G. W. Kammlott, and H. S. Chen, “New Pb-free solder alloy with superior mechanical-properties” Appl. Phys. Lett. 63 (1993) 15.
5. C. S. Chang, A. Oscilowski, and R. C. Bracken, “Future challenges in electronics packaging” IEEE Circuits Devices Mag. 14 (1998) 45.
6. M. Abtew and G. Selvaduray, “Lead-free solders in microelectronics” Mater. Sci. Eng. R 27 (2000) 95.
7. K. Zeng and K. N. Tu, “Six cases of reliability study of Pb-free solder joints in electronic packaging technology” Mater. Sci. Eng. R 38 (2002) 55.
8. L. F. Miller, “Controlled collapse reflow chip jointing” IBM J. Res. Develop. 13 (1969) 239.

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