可任意調整參數的無限脈衝響應數位濾波器之設計

Adjustable Coefficient Infinite Impulse Response Filter Design

簡志光(Chih-Kuang .Chien)

指導教授 ： 黃世旭

中原大學/工學院/電子工程研究所/碩士(2005年)

https://doi.org/10.6840/cycu200500215

摘要

現今數位通信系統已經廣泛運用數位濾波器的設計技術，但是對於整個系統來說，FIR濾波器雖然其控制迴路較易控制，但缺點是Latency時間較長，因此對系統設計而言延遲輸出成為一個很大的缺陷，因此對於某些系統設計者而言，希望輸出延遲的時間能夠縮短，所以IIR濾波器便取代FIR濾波器的設計，因為IIR濾波器有Latency時間較短的優勢，但是因為其Z-domain極零點逼向單位圓，因此控制迴路容易發散，不易收斂。
本論文在於設計可任意調整參數infinite impulse response filter 提供系統設計者彈性設計其系統，並以五階為例，可以讓IIR FILTER的LATENCY降為21個Clock cycles，其設計理念在於可以與DSP或者RISC相結合製作利用本論文所述之VHDL程式製作完整IP之SOC或者ASIC，以因應便利與降低成本之設計。

關鍵字

數位濾波器 ； 有限脈衝響應濾波器 ； 無限脈衝濾波器 ； 可調整參數無限脈衝濾波器

並列摘要

Nowadays, most communication systems employed digital filters. Among many kinds of filters, FIR filter is much easier to be controlled than others. However, the drawback of the FIR filter is that the latency is too long. The latency is a main weakness in an FIR design. Many designers hope that the latency can be shortened. Therefore, the IIR filter is gradually adopted because it has much shorter latency. However, the zero point of the IIR filter is close to the unit circle. Thus, the control character of IIR is discrete instead of convergent. This thesis is aimed to design a parameter adjustable IIR filter. It reduces the latency of the IIR filter to be 21 clock cycles for the five tiers filter. This filter can be combined with DSP or RISC to be a whole IP of SOC or ASIC so that the entire system is more efficient.

並列關鍵字

Digital Filter ； finite Impulse Response Filter ； Adjustable Coefficient Infinite Impulse Response Filter ； Infinite Impulse Response Filter

參考文獻

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