在半導體封裝製造產業領域裡,隨著科技時代的進步,各種電子電器產品的發展趨勢都朝輕、薄、短、小、多功能的整合導向,由於半導體封裝邁進高密度、高腳數的趨勢,其銲線也就朝著微細間距(Fine Pitch)的高精密度製程技術發展 本文以反應曲面方法( Respond Surface Method ) 探討封裝銲線製程之銲墊微細間距的最佳參數範圍,並建立兩階段的實驗設計;第一階段將影響銲線製程之參數因子納入實驗設計範圍,以部分因子實驗法找出影響微細間距銲線製程之主要因子,第二階段就影響銲線製程之顯著因子,再以反應曲面法加上中央合成設計求解出銲線製程微細間距之最佳參數範圍組合。結果顯示,由第一次實驗可得知 CV、USG Current 及 Force 為顯著因子,再以此三個顯著因子利用反應曲面方法加上中央合成設計求解出銲線製程微細間距之最佳參數範圍,不僅可縮短工時、提高良率、進而達到客戶之需求,以提高市場的競爭力。即為本論文研究最重要的利用價值。
In the semi-conductor assembly technology industries, following process of the technology, the development trends of different electric equipment products move towards the light, thin, short, small, and multi-functional merger direction. At present semiconductor encapsulation manufacturing fields all move towards the high density, high pin-foot, and high I/O. Following this semi-conductor assembly technology trends, the wire bonding manufacturing process of the semi-conductor assembly goes also towards the high precision wire bonding technology with fine pitch bonding. This paper is applied the response surface method to solve the optimum parameters of the wire bonding process on the IC packages, and setup two steps of design experience method. The first step is considered the all the factors which will impact on the wire bonding process, then applies the factional factor method to find out the effective factors of the wire bonding process with the fine pitch. The second step uses the response surface method with the central composite design to solve the optimize parameters range. The result showed that the CV, USG current, and force are the key factor in the first experiment, and the three key factors are again applied with both the response surface method and the central composite design to solve the optimum parameters ranges. It is not only the shortest time, but also gain to strengthen company's international competition, and then enable the incorporated business to manage continuously forever.