降低電源對心電訊號干擾之六十
赫茲帶拒濾波器與轉導放大器設計

本論文提出一種適用於心電圖訊號擷取的抗電源60-Hz干擾的帶拒濾波器。第一部分為一個高共模拒斥比以及低雜訊的轉導放大器，主要應用於生醫訊號雜訊的消除，此轉導放大器使用MIMOS 0.35µm與TSMC 0.35µm的模型模擬並比較，並以TSMC製程完成下線。本研究所設計之轉導放大器佈局前模擬之共模拒斥比分別為138.28dB與137.34dB(MIMOS與TSMC)，TSMC佈局後模擬之共模拒斥比為135.74dB。在雜訊邊限的部份，MIMOS與TSMC佈局前模擬分別為2.87mV2/Hz與486.90nV2/Hz，TSMC之佈局後模擬為488.26nV2/Hz。與本研究前一代之轉導放大器相比，此轉導放大器有較高的88.34dB之增益，86.34度的高相位邊限與2.64V的輸入共模範為，此OTA晶片面積為101 x 256 um2(不含PAD)、788 x 814 um2(含PAD)。本下線晶片以完成量測，輸出百幅為+1.65V~-1.65V，共模輸入範圍為2.43V。此轉導放大器應用於抗電源60-Hz干擾的帶拒濾波器，一般之作法是使用電阻與電容之被動元件所構成之雙T帶拒濾波器，本論文也模擬此電路特性，其中心帶拒頻率為60.11Hz與-60 dB之衰減，Q值為0.25。本論文是使用靴帶雙T結構之濾波器，Q值增加為3.48，此為雙T結構之13.92倍。由於此濾波器需整合在晶片中，而電阻又暫大部分的晶片面積，因此本論文使用切換式電容來等效電阻，四種切換式電容電阻皆已測試完成，包含並聯結構、串聯結構、串並結構與雙線性切換式電容電阻結構，並透過此切換式電容電阻以及外接之時脈訊號來完成本論完的濾波器晶片之設計。

關鍵字

低雜訊；轉導放大器；帶拒濾波器；心電圖訊號；電源干擾

並列摘要

A 60-Hz notch filter is designed to minimize the power line interference on electrocardiograph signals. A high CMRR and low noise operational transconductance amplifier was first designed which are major parameters for noise elimination on biomedical signals. The OTA was fully tested on all process corners for both MIMOS 0.35µm and TSMC 0.35µm technology and was fabricated using TSMC 0.35µm technology. The OTA has a CMRR of 138.28dB and 137.34dB for MIMOS and TSMC pre layout simulation respectively. TSMC post layout simulation shows a CMRR of 135.74dB. The noise margin on the other hand has a value of 2.87mV2/Hz and 486.90nV2/Hz for MIMOS and TSMC pre layout simulation respectively and as high as 488.26nV2/Hz for TSMC post layout simulation. In comparison with previously developed OTAs, the designed OTA has a high AC gain of 88.34dB, a high phase margin of 86.34o and ICMR of 2.64V. The OTA has a layout area of 101 x 256 um2 without the bonding pads and 788 x 814 um2 with bonding pads. The OTA chip was tested and testing results shows an output swing of -1.65V to +1.65V and ICMR of 2.43V. The designed high CMRR and low noise OTA was used in the design of the 60-Hz notch filter. The commonly used RC Twin T notch filter configuration was used in the initial design of the with its center frequency at 60.11Hz. It has an attenuation of -60 dB and a Q factor of 0.25. A bootstrapped Twin T configuration was then designed in order to increase the Q factor of the notch filter. The additional resistor in conventional bootstrapped Twin T was eliminated and was replaced by a single transistor thus having the possibility for chip implementation. The bootstrapped Twin T has a Q factor of 3.48 which is 13.92 times as that of unaided Twin T configuration. The Q of the bootstrapped Twin T is adjusted through the size of the transistor. The large resistor component for the RC Twin T notch filter was replaced with its switched capacitor equivalent. All four switched capacitor resistor equivalent configuration was tested – parallel, series, series-parallel and bilinear switched capacitor configuration. Through the use of switches, capacitors and an external clock, resistors can be replaced thus providing the possibility of chip implementation.

並列關鍵字

Operational transconductance amplifier ； Electrocardiograph signals ； Notch filter ； Low noise ； Power line Interference

參考文獻

[1] J. C. Huhta and J. G. Webster, “60-Hz Interference in Electrocardiography”, IEEE Transactions on Biomedical Engineering, vol. BME-20, no. 2, pp. 91-101, March 1973.

[3] S. Witthayapradit, S Chitwong and S. Tumthong, “Tracking Notch Filter For Electrocardiograph measurement”, IEEE CCECE/CCGEI, pp. 1395-1398, May 2006.

[5] P. S. Hamilton, “60Hz Filtering for ECG Signals To Adapt or Not to Adapt”, IEEE, pp. 779-780, 1993.

[6] S. C. Pei and C. C. Tseng, “Elimination of AC Interference in ECG Using IIR NF with Transient Suppression”, IEEE Transactions on Biomedical Engineering, vol. 42, no. 11, pp. 1128-1132, November 1995.

[7] L. Hejjel and L. Kellenyi, “The corner frequencies of the ECG amplifier for heart rate variability analysis”, Physiological Measurement, 26 39-47, 2005.

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降低電源對心電訊號干擾之六十赫茲帶拒濾波器與轉導放大器設計

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