使用新型頻段選擇壓控振盪器之低相位雜訊鎖相迴路

A low phase noise PLL using novel band-selection VCO

黃政霖(Cheng-Lin Huang)

指導教授 ： 陳淳杰

中原大學/工學院/電子工程研究所/碩士(2012年)

https://doi.org/10.6840/cycu201200390

摘要

鎖相迴路已成為在SOC(system on a chip)裡非常重要的IP(Intellectual Property)，像是振盪器應用在射頻電路，或是時脈產生器應用在高速I/O傳輸界面，以及在電源管理IC中都可以看到其身影。本論文我們使用TSMC互補式金氧半電晶體0.18μm製程來設計一個新型可自動選擇頻段的鎖相迴路，且產生480MHz的頻率可應用在USB2.0上。
壓控振盪器對鎖相迴路而言是非常重要的，因為會產生鎖相迴路頻寬外的相位雜訊，高Kvco會導致更高的相位雜訊，但低kvco又無法涵蓋所有的溫度及製程變異，因為Kvco與相位雜訊互為取捨關係。本論文利用上述辦法來提出一個能降低相位雜訊，同時多頻段仍能涵蓋所有的溫度及製程變異的鎖相迴路，也就是將鎖相迴路中壓控振盪器的等效增益分切為多段來降低Kvco，且可自動選擇適當應用的頻率為一特殊技巧，此外考量晶片的實用性，我們設計使系統能自動選擇鎖定頻段，同時仍保有小面積及低功率消耗的優勢，且此系統是以全數位方式實現，能容易地在其他製程應用上做更換。
內部的新型可頻段選擇壓控振盪器所消耗的晶片面積與功率佔整個系統的比例是非常少的，面積僅佔(70μm*110μm)且功率僅有70μW。此論文所量測出離中心頻率100KHz的相位雜訊為-126dB。

關鍵字

鎖相迴路 ； 製程變異 ； 相位雜訊 ； 可頻段選擇壓控振盪器

並列摘要

PLL (Phase lock loop) has become a very important IP (Intellectual Property) for SOC (system on a chip), such as oscillator in the radio frequency circuit and the high speed I/O or in the power management IC. In this project, we designed a novel PLL which can select the Kvco band of the PLL automatically in TSMC 0.18um CMOS process. The PLL can generate output frequency 480MHz to operate in USB2.0 application.
VCO is one of the most important component of PLL because it induces phase noise under out-band of PLL and so the gain of VCO (Kvco) is very sensitive for phase noise. As Kvco increases, the performance of phase noise from VCO is worse. However, the lower Kvco is difficult to meet the process voltage and temperature variation (PVT). For this reason, we design a band select mechanism which is lower Kvco to reduce phase noise effect from VCO. The band select mechanism is embedded in PLL to cut the original band of Kvco into multiple bands and select proper frequency band automatically. The mechanism is implemented by all digital circuit to make the IC more practical and robust for PVT.
Both the area and power of the mechanism are very trivial. The area of band select circuit (70μm*110μm) is a small proportion of the whole system and its power consumption is also very small (70μW).The phase noise of this project is -126dB at offset frequency 100KHz.

並列關鍵字

VCO with band select automatically ； phase noise ； PVT ； PLL

參考文獻

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