- 學位論文
溶液製作氧化鋯介電層應用於有機場效電晶體
Solution-processable ZrO2 dielectric for Organic Field Effect Transistors
摘要
在有機場效電晶體傳統所使用的絕緣層二氧化矽(SiO2)因為在製程上相當費時，又加上在未來趨勢電晶體要越做越小所以要盡可能的縮小元件的厚度，但是當縮小厚度時二氧化矽(SiO2)就不在適合當絕緣層會有嚴重的漏電流情形，所以高介電常數的材料逐漸被重視，本篇論文使用高介電常數材料氧化鋯做為絕緣層是利用氧化鋯溶液再利用簡單的液相製程Spin-coating製作絕緣層，并五苯(Pentacene)做為有機半導體層，並分為三個部分探討最適合絕緣層的製程，首先依照不同轉速討論適合的轉速我們選擇了3000至7000的速度，以及退火溫度還有退火時通入氮氣的不同時間做為討論，使用原子力顯微鏡(Atomic Force Microscope)觀察不同溫度不同轉速對Pentacene利用真空鍍膜在絕緣層上的影響，在製程Pentacene薄膜電晶體量測電性加以探討。 最後得到實驗最佳條件為利用500℃進行退火並且先通入氮氣60分鐘，可以使Pentacene在成膜後有最佳的情況，使元件在電洞的傳遞效率有較高的效率達到3.59cm2/vs啟動電壓也可以達到-0.013V。
並列摘要
In organic filed effect transistors we used the silicon dioxide for dielectric, when we do this process taking a lot of time, and the transistors size as small as possible, but when we reduce silicon dioxide thickness the current density is to high so not able to do the dielectric. The High-K materials gradually being taken seriously. In this study we used the High-K materials zirconium oxide, and prepared the zirconium oxide solution was the simple solution process Spin-coating for High-K dielectric layer, in organic semiconductor layer was pentacene. We report three section explore the most suitable process of the insulating layer, for the first part different revolution speed we try 3000 to 7000 rpm. For the second part different annealing temperature, for the third part when annealing pass into the nitrogen as different time, and use Atomic Force Microscopy (AFM) observed at different annealing temperature, time and speeds effect of vacuum deposition Pentacene on the dielectric layer. Finally in this study we measure electronic transport properties of pentacene-base organic filed effect transistors. Finally in this experimental the best condition used the 500℃ annealing and pass into nitrogen 60 minutes, the pentacene thin film also best. This device mobility reach 3.59cm2/sv threshold voltage -0.013V.