應用於生醫感測網路上身晶片系統之時脈資料恢復接收機

無線生醫感測系統是目前非常熱門的研究領域之ㄧ，未來將會發展成穿戴式或植入式生醫元件可以利用身體網路來管理身體健康。本論文的目標在設計一個時脈資料回復電路應用於無線生醫感測系統接收器上。本論文使用TSMC 0.35μm CMOS製程來設計時脈資料回復電路，電路整體架構採用鎖相迴路概念。時脈資料回復電路廣泛的應用在資料傳輸系統上，它可以將輸入走樣的資料萃取出乾淨的時脈以及將走樣的資料還原成乾淨的資料。訊號經由人體傳輸而產生衰減及失真，時脈回復電路的主要功用就是將衰減及失真的訊號做還原。為了達到無線生醫監控的目標，本次設計的目標著重在低功率消耗及低位元錯誤率，延長電池壽命及系統整體準確性。

關鍵字

無線生醫感測、時脈資料回復電路、位元錯誤率

並列摘要

The Bio-medical signal wireless sensor system is one of the hottest research topics. In the future, it will be developed a wearable or implantable bio-medical device that can be used for the health management by using the body area connectivity. This thesis proposed a low data rate Clock and data recovery (CDR) for bio-sensor applications. In this thesis, a CDR circuit with PLL-based topology has been designed in TSMC 0.35μm CMOS process. The CDR circuits have been widely used in data communication systems. It must extract pure clocks from the corrupted input data and regenerate the clean data output by the extracted clocks. To achieve the goal of wireless biomedical monitoring, these circuits will focus on low power consumption and low bit-error rate to extend battery lifetime and improve accuracy.