雙算術邏輯運算單元處理器之模擬器設計及其於模糊類神經網路之實現

本篇論文為設計出一套處理器之模擬器，並應用在模糊類神經網路上。此模擬器的功能在於模擬實驗室已設計出的雙算術邏輯運算單元處理器，指令包含資料轉換、布林運算、四則運算、雙算數邏輯運算、旋轉位移、控制指令，並能在電腦視窗中顯示當時佔存器和記憶體的動作，使在程式設計上能即時看到處理器內部運算現況，與工作站相比，減少了相當多的時間，對往後嵌入式系統設計應用上方便許多。接著，以模擬模糊類神經網路在處理器執行的效果做為驗證。程式設計撰寫上，使用雙算術邏輯運算單元此特殊架構的平行運算能力，可有效將運算工作分配給兩顆ALU，達到減少程式行數、增加硬體處理速度，並實現模糊類神經網路在硬體上的運作。

關鍵字

模擬器；雙算術邏輯運算單元處理器；模糊類神經網路

並列摘要

This thesis aims on designing a simulator for Dual-ALU Processor and its implementation of Fuzzy Neural Networks (FNN). The simulator can simulate the existing Dual-ALU Processor of which instruction set including data transfer, Boolean, Add/Sub, Mac/Div, Dual-ALU, shift/rotate, and control instruction. It can show the address and value of registers and RAM on the screen, making Processor operation observable while programming. Therefore, simulation on FNN running on processer verifies simulator performance. While programming, using the parallel calculation capability of Dual-ALU Processor, we can efficiently designate the computations to dual-ALU, speed hardware processing and realize the running of FNN on hardware.

並列關鍵字

Simulator ； Dual-ALU Processor ； Fuzzy Neural Network

參考文獻

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