嵌入式8-bit AES系統之無線傳輸應用與影像加密分析

Embedded 8-bit AES System of Wireless Transmission Applications and Image Encryption Analysis

劉適豪(Shih-Hao Liu)

指導教授 ： 黃奇武 ； 張吉正

國立臺灣師範大學/科技學院/應用電子科技研究所/碩士(2011年)

摘要

本論文運用高等加密演算法(Advanced Encryption Standard)實現於可程式化閘陣列(FPGA)之嵌入式系統實現與應用。

本研究主要分為軟體與硬體的實現與驗證，我們使用MATLAB來實現AES-128，硬體部分是應用8位元的架構來實現AES-128，並且與8-bit PicoBlaze微處理器做整合，配合UART傳輸協定，透過RS-232轉藍芽之無線通訊模組連接電腦端與FPGA實驗板，再以PicoBlaze微處理器控制AES的加密運算，最後由電腦端的超級終端機上呈現加密結果。並且我們將此AES加解密演算法，應用於圖像的加密，透過不同的加密模式，ECB mode、CBC mode、CFB mode、OFB mode，並且分析比較在不同的加密模式之下，其中的優缺點。

在開發工具上的使用，主要是使用MATLAB7.4.0與Xilinx公司所提供的軟體ISE9.2與ISE10.1版，並且利用spartan-3an晶片中的PicoBlaze微處理器來達成嵌入式加解密系統。

關鍵字

進階加解密標準 ； 影像加密 ； 嵌入式系統 ； PicoBlaze

並列摘要

This paper is about a procedure apply Advanced Encryption Standard on FPGA of embedded system.
This paper will divide into two parts, the achievement and verification of the software and of the hardware. We use MATLAB to perform AES-128, using an 8-bit AES construction to perform AES-128 on the hardware, and integrate with 8-bit PicoBlaze microcontroller. By using the UART transfer protocol and the RS-232 to Bluetooth wireless to connect the computer system to the FPGA board. And then PicoBlaze will be used to control the AES encryption processing and display the encryption result through the hyper-terminal on the computer system. Furthermore, we apply this AES encryption processing on images. By some differents modes of encryption including ECB mode, CBC mode, CFB mode, OFB mode. We will analyze and compare the advantages and disadvantages of different modes when used in image encryption.
The tools that we operated in this research are MATLAB7.4.0 and Xilinx ISE9.2i andISE10.1 software, and also the PicoBlaze microprocessor that is embedded in the Spartan-3an will be used for encryption.

並列關鍵字

AES ； Image Encryption ； Embedded System ； PicoBlaze

參考文獻

[1] National Bureau of Standards, “Data Encryption Standard. Federal Information ProcessingStandards ProcessingStandards Publication， FIPS PUB 46, January 1977.

[2] NIST. Institute of Standards and Technology, “Specification for the Data encryption Standard(DES),” FIPS PUB46-3, October 1999.

[5] P. Chodowiec and K. Gaj, “Very Compact FPGA Implementation of the AES Algorithm,” CHES 2003, Vol. 2779, September 2003.

[6] Kuo-Huang Chang, Yi-Cheng Chen, Chung-Cheng Hsieh, Chi-Wu Huang, Chi-Jeng Chang, “Embedded a Low Area 32-bit AES for Image Encryption/Decryption Application” IEEE ISCAS.2009, p 1922-1925, May 2009.

[7] X.Zhang and K.K.Pari, “High Speed VLSI Architectures for the AES Algorithm,”IEEE Trans. VLSI Systems, vol. 12, no. 9, September 2004.