鐵酸鉍薄膜摻雜鈮之金屬/鐵電層/絕緣層/矽記憶體電容結構的特性研究

The studies of Nb-doped BiFeO3 films for metal/ferroelectric/insulator/semiconductor capacitors in memory applications

賴景承

指導教授 ： 劉傳璽博士 ； 阮弼群博士

國立臺灣師範大學/科技學院/機電科技研究所/碩士(2011年)

摘要

此實驗為金屬層-鐵電層-絕緣層-矽基底(MFIS)之電容器結構的研究，在鐵電層以鐵酸鉍(BiFeO3)摻雜鈮(Nb)來提高鐵電記憶體結構的性能並減少漏流產生，用(HfO2)作為絕緣層來抑制鐵電層與矽基底兩層之間的相互擴散、反應。
在此研究中，控制鈮的摻雜濃度，氬氧氣比例，RTA溫度，HfO2厚度，製備出鐵電電容器，再應用原子力顯微鏡(AFM)與X光繞射儀(XRD)來分析薄膜的表面形貌與晶相，另外應用C-V與I-V儀器來分析MFIS電容器結構的電器特性。從AFM與XRD圖片分析出得知，當退火溫度越高時薄膜的結晶訊號越明顯，當Nb和O2摻入BFO薄膜中經由C-V與I-V儀器的量測，發現Nb原子取代Fe位置和薄膜的氧空缺減少情形，使得鐵電記憶體的性能有顯著的改善。另外非晶態HfO2絕緣層的厚度增加其記憶視窗寬也增加但因為電荷注入現象產生使得記憶視窗寬隨之減少。但絕緣層的厚度太厚造成更大的壓降在絕緣層上使得記憶視窗寬減少。實驗結果顯示當掃描電壓為±8 V，最大的記憶視窗寬可達2.98 V，其製程參數是DC Power:Nb(15 W)，氬氧氣比例為10，絕緣層厚度為40 nm，退火溫度600 ℃。而此MFIS電容器結構之製程參數，擁有良好的鐵電記憶特性，因此可應用在非揮發性鐵電記憶體上。

關鍵字: BiFeO3，鐵電層，HfO2，金屬層-鐵電層-絕緣層-矽基底。

關鍵字

BiFeO3 ； 鐵電層 ； HfO2 ； 金屬層-鐵電層-絕緣層-矽基底

並列摘要

Metal-ferroelectric-insulator-semiconductor (MFIS) capacitors with Nb-doped BiFeO3 (BFO) ferroelectric layer and HfO2 insulator layer have been fabricated. The purpose of Nb doping is to improve the ferroelectric properties by reducing the leakage current; the insulator layer is to suppress the inter-diffusion and reaction between the ferroelectric layer and silicon substrate.
In this study, the process parameters include the Nb doping concentration, Ar/O2 ratio during sputtering, RTA temperature, and HfO2 thickness. The surface morphology and crystalline phase of annealed films were analyzed by AFM and XRD, respectively. Moreover, the electrical properties of the MFIS capacitors were characterized through capacitance-voltage (C-V) and current-voltage (I-V) measurements. AFM and XRD techniques indicate that the crystallization of annealed films increases as RTA temperature. C-V and I-V measurements reveal that the ferroelectric memory performance can be significantly improved through Nb doping and O2 incorporation in the BFO films due to Fe-site substitution by Nb atoms and reduction of oxygen vacancies. Moreover, for amorphous HfO2 insulator layers, the memory window increases with HfO2 thickness due to reduction of charge injection. However, on the other hand, a thicker HfO2 layer results in a larger voltage drop across the insulator layer, which may dominantly narrow down the memory window. The maximum ferroelectric memory window is 2.98 V obtained from a sweep voltage of ± 8 V for the samples with 40-nm-thick HfO2 insulator and RTA temperature of 600 ℃. This good ferroelectric memory performance of the MFIS structure shows its feasibility for nonvolatile memory applications.

Keywords: BiFeO3, Ferroelectric, HfO2, Metal-ferroelectric-insulator-
semiconductor

並列關鍵字

BiFeO3 ； Ferroelectric ； HfO2 ； Metal-ferroelectric-insulator-

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