透過您的圖書館登入
IP:18.188.20.56
  • 學位論文

切換電容式三角調變之展頻時脈產生器

Triangular Modulation using Switched-Capacitor Scheme for Spread Spectrum Clocking

指導教授 : 黃弘一
若您是本文的作者,可授權文章由華藝線上圖書館中協助推廣。

摘要


本論文之三角調變器使用交換式電容方式來實現展頻時脈產生器,工作原理為輸入訊號調變為三角波訊號,將分散各次諧波的能量呈一定頻率的波段,因而降低峰值電磁干擾(EMI)的諧波頻率。本研究之三角調變器總電容為20pF,在Hspice模擬中使用1um高電壓製程來實現。調變信號頻率為257赫茲和幅度為150 mVpp主要應用於65 kHz振盪器。頻率誤差是大約在±4千赫茲左右。模擬結果顯示EMI減少13.8分貝。此電路是應用於振盪電路中的PWM控制器IC。電力損耗為2.16mW。傳統的理論分析和創新的部份也是使用公式證明。人工計算指數與模擬部分相比最大誤差為3.1%。

並列摘要


A triangular modulation profile using switched-capacitor scheme for spread spectrum clock generator (SSCG) is presented in this paper. The working principle consists of modulating the oscillator’s constant clock frequency with a triangular signal. This will spread the energy of each harmonics into a certain frequency band, thus reducing the peak amplitude of electromagnetic interference (EMI) at harmonic frequencies. This work aims to implement triangular modulation with a constraint of 20pF total capacitor for cost efficiency. The device models of a 1um high-voltage CMOS process is applied for Hspice simulation. The modulating signal which has a frequency of 257 Hz and amplitude of 150 mVpp is used to modulate a 65 kHz oscillator. The frequency deviation is maintained to be within ± 4 kHz. Simulation shows an EMI reduction of 13.8 dB. This work is applied in the oscillator circuit of a PWM controller IC. The power consumption is 2.16mW. Theoretical analysis of traditional modulations and the proposed scheme are also formulized. The hand calculation of the modulation index using the proposed formula has only a maximum error of 3.1 percent compared to simulation.

參考文獻


[1] C.D. LeBlanc, B.T. Voegeli, and T. Xia, “Dual-loop direct VCO modulation for spreadspectrum clock generation,” IEEE CICC 2009.
[2] Y.-B. Hsieh, and Y.-H. Kao, “A fully integrated spread-spectrum clock generator by using direct VCO modulation,” IEEE Trans. on Circuits and Systems-I:Regular Papers, vol. 55, no.7, Aug. 2008.
[3] S. Damphousse, K. Ouici, A. Rizki, and M. Mallinson, “All digital spread spectrum clock generator for EMI reduction,” IEEE J. Solid-State Circuits, vol. 42, no. 1, pp. 145-150, Jan. 2007.
[4] J. Kim, D.G.Kam, P.J. Jun, and J. Kim, “Spread spectrum clock generator with delay cell array to reduce electromagnetic interference,” IEEE Trans. Electromagn. Compatibility, vol. 47, no. 4, pp. 908-920, Nov. 2005.
[5] O. Trescases, G. Wei, A Prodic, and W-T. Ng, “An EMI reduction technique for digitally controlled SMPS,” IEEE Trans. Power Electron., vol. 22, no.4, pp. 1560-1565, July 2007.

延伸閱讀