一個支援多無線網路標準矽智財(Silicon Intellectual Property, SIP),整合於跨協定(Cross-Layer)控制系統中,可和不同協定層進行訊號交換,提供 IEEE 802.11 區域網路、IEEE 802.11p VANET與 IEEE 802.16e/j/m 都會網等等多種無線標準之跨協定QoS控制以維持QoS品質。 我們利用模糊控制理論克服動態網路環境非線性與不確定性所造成的影響,提出階層式跨協定控制(Hierarchical Cross-Layer Control; HCLC)的架構來降低整個系統的複雜度,並依據Lyapunov穩定性原則,在不同無線標準之下重複利用QoS控制器,在切換無線標準時達到重複利用電路的目的。 我們以相容AMBA on-chip Bus的介面包裝矽智財,並提供嵌入式Linux驅動程式以及中介軟體(Middleware),以期能整合到NIC網路卡中的MAC晶片,使MAC晶片可以支援跨協定QoS控制。驗證上利用NS-2(網路模擬器)驗證矽智財的效能,以XILINX Spartan-3 XC3S4000實現之矽智財共使用11,575 gate count(等效面積),僅需12.5MHz clock rate,使功耗不到314mw,便可達到IEEE 802.11e和IEEE 802.16e/j/m之下之QoS以及公平性保證。
We propose a Silicon Intellectual Property (SIP), integrated in a Cross-Layer control system, capable of signaling with different protocol layers provides IEEE 802.11 WLAN, IEEE 802.11p VANET, and IEEE 802.16e/j/m MAN multiple wireless technologies novel cross-layer QoS controls. We propose Hierarchical Cross-Layer Control (HCLC) framework for complexity reduction of the whole control system. Based on Lyapunov stability principle, we reuse QoS control SIP in when vertical handover switches among the wireless technologies. The proposed SIP is wrapped with AMBA on-chip bus and we provide embedded Linux driver and middleware for integration to an MAC SoC of NIC cards. Therefore, the MAC SoC with the proposed SIP supports cross-layer QoS conrol. In the verification and algorithm-architecture exploration, we utilize the network simulator (NS-2) for whole HCLC control system realization. Implemented with XILINX Spartan-3 XC3S4000 FPGA, the SIP occupies 11,575 gate count and only 12.5MHz clock is needed to perform the HCLC control such that it consumes only 314 mw to assure both QoS and fairness for different wireless technologies.