以FPGA為基礎之數位控制高功因升壓型轉換器研製

Implementation of FPGA-Based Digital Control for Boost Power-Factor-Correction Converters

林俊豪(Jiun-Hau Lin)

指導教授 ： 陳信助

共同指導教授 ： 楊松霈

崑山科技大學/工程學院/電機工程研究所/碩士(2011年)

摘要

本文以現場可規劃邏輯陣列(FPGA)為控制核心，應用主動式功因校正技術的平均電流控制法，實現高功因升壓型轉換器，以提高功率因數，減少輸入電流諧波，符合國際電流諧波規範。
平均電流控制法包含內迴路電流控制與外迴路電壓控制，其中內迴路電流控制是為了使平均輸入電流追隨輸入電壓波形，讓轉換器具有高功因性能；外迴路電壓控制是為了使輸出電壓不受輸入線電壓與負載變動的影響，讓轉換器具有穩壓性能。
高功因升壓型轉換器的數位控制實現是使用FPGA開發板DE2-70，其FPGA晶片為Cyclone II EP2C896C6N。控制演算法是在軟體環境Quartus II中，使用Verilog硬體描述語言作程式設計。
在實作中，研製了一組以FPGA為控制核心之350 W高功因升壓型轉換器，其交流輸入電壓90 ~ 130 V，直流輸出電壓312 V。由實驗結果顯示：轉換器在不同負載情況下，確實都具有高功因特性，並符合電流諧波規範IEC61000-3-2，且在輸入電壓振幅變動及負載變動下，都能具有良好的輸出穩壓性能。

關鍵字

升壓型轉換器 ； 功因校正 ； FPGA

並列摘要

A field programmable gate array (FPGA) based digital control for boost power-factor -correction (PFC) converter with average current-mode control (ACC) is implemented in the thesis. It is designed to fulfill the international current standards on power factor and input current harmonic distortion of power supplies.
The ACC-controlled boost PFC converter includes inner current loop and outer voltage loop. The inner current loop regulates the input current, so that its average value during each switching period follows the rectified input voltage to achieve high power factor. The outer voltage loop maintains the rectifier output voltage at a reference level against variation in load and fluctuation in line voltage.
The digital control design of the boost PFC converter with ACC is implemented by the development board DE2-70 based on the FPGA chip Cyclone II EP2C896C6N. The control algorithm is developed in the Quartus II software using the hardware description language Verilog.
A prototype of 350 W FPGA-controlled boost PFC converter with 90~130 V in the ac input and 312 V in the dc output has been built. In the different power cases, the experimental results are provided to verify the high power factor complying with IEC61000-3-2 and the well output voltage regulation against the input voltage variation and load change.

並列關鍵字

boost converter ； PFC ； FPGA

參考文獻

[50] 林正平，以FPGA為基礎之切換式磁阻馬達驅動系統設計與實現，崑山科技大學電機工程系，2004。

[2] J. L. Lin, S. P. Yang and P. W Lin, “Small-Signal and Controller Design for an Isolated Zeta Converter with High Power Factor Correction,” Electric Power Systems Research, Vol. 76, pp. 67-76, 2005.

[3] J. A. Pomilio, G. Spiazzi and S. Buso, “Comparison Among High-Frequency and Line-Frequency Commutated Rectifiers Complying with IEC 61000-3-2 standards”, IEEE IAS, Vol. 4, pp. 2218-2223, 2000.

[4] W. Zhang, Y. F. Liu and B. Wu, “A New Duty Cycle Control Strategy for Power Factor Correction and FPGA Implementation,” IEEE Trans. Power Electronics, Vol. 21, No. 6, pp. 1745-1753, Nov. 2006.

[5] Y. Jayaraman and U. Ravindran, “FPGA Implementation of Predictive Control Strategy for Power Factor Correction,” World Academy of Science, Engineering and Technology , Vol. 39, pp. 199-204, 2008.