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  • 學位論文

可任意控制輸出之多值邏輯電路設計

Design of Multiple-Valued Logic Circuit with Arbitrarily Controlling the Output State

指導教授 : 蔡澈雄
共同指導教授 : 甘廣宙(Kwang-Jow Gan)

摘要


本論文是以負微分電阻元件(NDR)為基礎來設計電路,其架構是由氧化半導體場效電晶體(MOSFET)及異質接面電晶體(HBT)所構成的等效電路,電路架構是由三個NMOS及一個HBT所組成,我們稱此元件為MOS-HBT-NDR元件。在串聯或並聯N個NDR元件後,可以在其電流-電壓曲線上獲得N個峰值與谷值,並且其電流-電壓曲線具有獨特的摺疊特性,此特性可以幫助減少電路所使用的元件數,並且降低電路的複雜度,因此我們可以利用此特性來設計多值邏輯電路。

並列摘要


In this paper,We design circuits which base on negative-differential-resistance(NDR) devices,NDR device is composed of metal-oxide semiconductor field effect transistor (MOSFET) and hetero junction-bipolar-transistor(HBT)。N NDR devices are connected in series or parallel,they show the folding I-V characteristics which have N peaks and N valleys。The folding I-V characteristics can reduce the number of devices which will be used and complexity。We are interesting in the multiple-valued logic circuit。

參考文獻


[1] R. Tsu and L. Easki, “Tunneling in a finite superlattice”, Appl.Phys.Lett.22,
MOSFET device”, IEEE J. Solid-State Circuits, vol.14, Dec.1979, pp.1094-1011.
[3] C. Seabaugh et al, “Nine-state resonant tunneling diode memory”, IEEE Electron
[4] Z. X Yan et al, “A new resonant-tunnel diode-based multivalued memory circuit
1202, 1992.

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