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  • 學位論文

微波濾波器及低雜訊放大器設計

Design of Microwave Filter and Low Noise Amplifier

指導教授 : 沈自
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摘要


本論文主要分為主動電路與被動電路,被動部分濾波器設計利用綜合法實現廣義柴比雪夫(General Chebyshev)函數之濾波器。先設計出一個步階式諧振器,並彎曲以達到微小化。在決定好濾波器階層後,首先先計算出耦合矩陣,並比較與模擬結果是否相符。電路之實現主要可分為電路設計與晶片製作兩部分。在電路設計部分,首先決定濾波器之規格,再根據濾波器的基本理論求出所需之參數。在模擬軟體部分,乃利用Agilent公司的ADS設計軟體計算出外部品質因數,耦合係數及調整諧振腔之間的最佳距離。最後將此改良式濾波器分別設計並實現在FR4基板, WIN 0.15 um PHEMT積體電路製程上。對FR4基板,其中心頻率為2.4GHz;對PHEMT製程,則為應用於WiGig 60GHz。此濾波器設計之優點為,對二次諧波有相當好之抑止效果,並具有相當小之電路尺寸,其insertion loss衰減最小值之模擬結果為-3.041dB,return loss為-17.484dB,3dB頻寬比為6.84%。 在低雜訊放大器設計方面利用共源極退化式電感並使用串接結構及透過調整電感Lg及Ls的數值大小,來做輸入端的阻抗匹配,可以有較佳的輸入阻抗匹配、較低雜訊及可以達到最大功率傳輸的特性,所以近年來在設計高頻低雜訊放大器時,常採用此架構進行匹配。主要設計應用於雷達系統中3.1-10.6GHz頻段的低雜訊放大器,最終模擬之結果S21為16.873~19.81dB,雜訊指數為3.298~3.414dB量測結果S21為7.364~20.288 dB。

並列摘要


In this thesis divided active circuit and passive circuit, for the filter design a synthesis method, to realize the General Chebyshev function filter. A step impedance resonator was designed,and it was curved to miniaturize. After deciding the order of filters,the coupled matrix was calculated. This matrix is then compared with simulation results to check the agreement. There are two parts in the realization of filter. For the circuit design, the filter standard was firstly decided and the parameter was obtain from the basic filter theory. The simulation software was adopted the Agilent company to calculatie ADS software the extermal quality factor and adjust the coupling coefficient and resonator gap. The filters were then to realized on FR4 substrate and WIN 0.15um PHEMT integrated circuit. The center of frequency for the FR4 board was 2.4GHz. The PHEMT process was for the application at WiGig 60GHz. The main advantage of filter was to restrain the second harmonic wave and reduce the size of the circuit. The simulated of minimum insertion loss is -3.041 dB, return loss is -17.484 dB and bandwidth is 6.84%. For the amplifier design, it use of low- noise amplifier source degeneration inductor and cascade structure to adjust inductors Lg and Ls and adjust the values of input impedance matching. It can obtain a better input matching, lower noise, and a maximum power transfer characteristics. In recent years, this structure is used to design in high frequency the low noise amplifier. It is mainly for the radar system in 3.1-10.6GHz band. This amplifier was realized in the PHEMT process and simulated results of S21 is 16.873 ~ 19.81dB and the noise figure is 3.298 ~ 3.414dB, measurement results of S21 is 7.364~20.288 dB.

參考文獻


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