鈦鋁摻雜氮氧化鉿鑭在前瞻金氧半電容特性研究

Electrical and Reliability Characteristics of Advanced Metal-Oxide-Semiconductor Capacitors with Various Ti- and Al-doped HfLaON Dielectrics

吳昱震(Yu-Zhen Wu)

指導教授 ： 洪政豪

共同指導教授 ： 鄭錦隆(Chin-Lung Cheng)

國立虎尾科技大學/工程學院/機械與機電工程研究所/碩士(2010年)

摘要

當元件製程縮小化，同時閘極氧化層也會跟著縮小，進而衍生出穿隧漏電流效應等問題，而會導致高耗電量。本篇主要用Hf2La2O7高介電係數以共同濺鍍方式沈積Ti和TiAl，具不同Ti和TiAl含量之HfLaTiON及HfLaTiAlON高介電係數，利用不同比例Ti和TiAl的摻雜量搭配不同沉積後溫度熱處理，形成複合材料HfLaTiON、HfLaTiAlON，探討對金氧半(Metal-Oxide-Semiconductor, MOS)元件的電性及可靠度影響，並利用材料分析得出HfLaTiON、HfLaTiAlON之組成比、結晶特性、能隙與能帶圖等，藉由電流-電壓-變溫(I-V-T)量測獲得漏電流傳導機制。
實驗結果指出，HfLaTiON以共同濺鍍的方式摻雜Ti後，HfLaTiON具有很低的等效氧化層厚度(EOT)，而Ti共同濺鍍16秒，經過750 ℃快速熱退火處理，可獲得最佳的等效氧化層厚度為1.7 Å 及介面缺面密度為3.19×1011 cm-2 eV-1，而RTA 750 ℃而Ti共同濺鍍32秒，從Schottky Emission量測可萃取出Schottky能障為0.8 eV。而另一個高介電係數材料HfLaTiAlON以共同濺鍍的方式摻雜TiAl後，HfLaTiAlON具有很低的等效氧化層厚度(EOT)，而Ti共同濺鍍50秒，經過950 ℃快速熱退火處理，可獲得最佳的等效氧化層厚度為0.93 Å 及介面缺面密度為1.9×1011 cm-2 eV-1，而RTA 650 ℃而Ti共同濺鍍50秒，從Schottky Emission量測可萃取出Schottky能障為0.74 eV。
藉由Ta在HfLaTiON及HfLaTiAlON的功函數、Ta/HfLaTiON
Ta/HfLaTiAlON的Schottky barrier及HfLaTiAlON、 HfLaTiON能隙等的測量可獲得能帶圖，提供元件各種特性的參考輔助。

關鍵字

高介電係數 ； 氮氧化鈦鋁鉿鑭 ； 後沉積熱處理 ； 濺鍍機

並列摘要

High-dielectric-constant (high-k) gate oxides with larger physical thickness while identical equivalent-oxide-thickness (EOT) have been widely used to supersede SiO2 for reducing gate leakage current in metal-oxide-semiconductor (MOS) devices. In this thesis, electrical and reliability characteristics of advanced MOS capacitors with various Ti- and Al-doped HfLaON dielectrics were demonstrated. Various Ti and TiAl concentrations in HfLaTiON and HfLaTiAlON dielectrics were achieved by co-sputter time of Ti, TiAl, and Hf2La2O7 targets. Modulated parameters include the co-sputter time of Ti, TiAl, and Hf2La2O7 targets, as well as post-deposition annealing (PDA). The compositions, crystalline properties, and energy band gap of HfLaTiON and HfLaTiAlON dielectrics were investigated by XPS, XRD, and UV/VIS/IR spectrophotometer, respectively. The results indicate that lower EOT of 0.17 nm and interface trap density (Dit) can be obtained by Ti-doped HfLaON dielectrics. The estimated Schottky barrier height during gate injection in Ta/HfLaTiON interface was around 0.8 eV. Also the results indicate that lower EOT of 0.093 nm and interface trap density (Dit) can be obtained by TiAl-doped HfLaON dielectrics. The estimated Schottky barrier height during gate injection in Ta/HfLaTiAlON interface was around 0.74 eV.

並列關鍵字

High-k ； HfLaTiAlON ； Post-Deposition Annealing ； Sputter

參考文獻

[1] N. Lu, H.-J. Li, J. J. Peterson, D. L. Kwong, “HfTiAlO dielectric as an alternative high-k gate dielectric for the next generation of complementary metal-oxide-semiconductor devices,” Appl. Phys. Lett. 90 (2007).

[2] H. J. Li, J. Price, M. Gardner, N. Lu, D. L. Kwong, “High permittivity quaternary metal (HfTaTiOx) oxide layer as an alternative high-κ gate dielectric,” Appl. Phys. Lett. 89 (2006).

[3] Q. Xu, G. Xu, W. Wang, D. Chen, S. Shi, Z. Han, T. Ye, “Study on characteristics of thermally stable HfLaON gate dielectric with TaN metal gate,” Appl. Phys. Lett. 93 (2008).

[4] H. Arimura, N. Kitano, Y. Naitou, Y. Oku, T. Minami, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe, “Excellent electrical properties of TiO2/HfSiO/SiO2 layered higher-k gate dielectrics with sub-1 nm equivalent oxide thickness,” Appl. Phys. Lett. 92 212902 (2008).

[5] G. K. Dalapati, A. Sridhara, A. S. W. Wong, C. K. Chia, and D. Z. Chi,“ HfOxNy gate dielectric on p-GaAs ,” Appl. Phys. Lett. 94 073502 (2009).