在4H碳化矽基板以局部氧化隔離技術製作之蕭基二極體暨溝槽式接面位障蕭基二極體之研究

A Study on Schottky Diode with LOCOS Isolation and Trench Junction Barrier Schottky Diode on 4H-SiC

李佳恩(Jia-En Lee)

指導教授 ： 林詩淳

國立交通大學/電機學院/電子工程系所/碩士(2018年)

摘要

碳化矽做為寬能隙材料，在高溫、高壓和大電流領域中有很好的應用潛力。而二極體是最基本的半導體元件。單極性的蕭基二極體相較於雙極性的PN二極體來說，具有較快的開關速度、較低的開關功率損耗、以及較低的導通壓。但是，較小的金屬半導體位障高度不只降低了其導通壓，他也會造成蕭基二極體有比PN二極體還大的逆向漏電流。溝槽式接面位障蕭基二極體藉由p+區以及溝槽式結構的設計，可以改善蕭基二極體高漏電流的缺點，同時也可以保持其在正偏時良好的特性。
在之前的研究中，有實際製作出不同於其他文獻的溝槽式接面位障蕭基二極體。我們的溝槽式接面位障蕭基二極體不同的地方在於他有溝槽頂部與溝槽側壁兩個蕭基金屬接觸區。我們預期這樣的設計可以大幅提升他在正偏時的特性，但製作出的元件卻沒有符合預期的結果。因為溝槽頂部跟側壁的晶面不同，所以蕭基位障高度也會不一樣，這會造成溝槽側壁的蕭基二極體沒辦法順利被導通。
本篇研究中，我們試著用氬氣電漿作用在溝槽側壁，希望藉此處理消除掉溝槽頂部跟側壁的蕭基位障高度之差異。我們設計了新的側壁蕭基二極體，改以PN接面來隔絕溝槽頂部和底部，這樣的元件設計會大幅地降低溝槽側壁的製作及研究難度。結果顯示，經過氬氣電漿及500度退火處理後，溝槽側壁與頂部的蕭基位障高度會只相差0.06 eV。此外，我們也拿這種新穎的溝槽式接面位障蕭基二極體與一般文獻上的設計用TCAD模擬來做比較，來釐清這種元件結構所能帶來的優點以及需要改善的地方。在我們這種溝槽式接面位障蕭基二極體中的蕭基二極體的蕭基位障高度設定為1.49 eV時，他可以在不犧牲逆偏特性的情況下，有著比一般溝槽式接面位障蕭基二極體大的導通電流。對於溝槽深度為1.5微米，p+間距為3微米的結構下，我們溝槽式接面位障蕭基二極體在1.5 V順偏下的電流約為一般結構的170%。
在一般的碳化矽製程中，通常是利用化學氣相沉積法疊一層二氧化矽來當作場氧化層。這樣的整面覆蓋氧化層隔離技術與矽的隔離技術來做比較，是非常落後的。因此，碳化矽的隔離技術還有很大的改善空間。在之前的研究中，我們可以藉由離子植入來達成碳化矽的局部氧化製程。這樣的製程應用在4H碳化矽上也不會有如其他應用在6H碳化矽的文獻中會發生再結晶回多晶的結果。
故在本篇研究中，我們繼續此局部氧化的研究。我們會製作蕭基二極體並以局部氧化製程做出場氧化層。我們會比較局部氧化法與整面覆蓋氧化層法這兩種隔離技術對電性的影響，藉此評估這樣的局部氧化隔離技術是否已可應用在元件製作上或是需要更進一步的改善。實際製作出來的蕭基二極體雖然會因為不理想的元件周圍區而產生非理想的特性，但若加入終端防護之後，這樣的缺點可以很容易地被解決。因此，這擁有半嵌入氧化層結構的局部氧化隔離技術，會在4H碳化矽積體電路的製程上有很大的應用潛力。

關鍵字

局部氧化隔離技術 ； 溝槽式接面位障蕭基二極體 ； 碳化矽隔離技術 ； 4H-碳化矽

並列摘要

Silicon carbide (SiC) has shown its potential for high-temperature, high-voltage, and high current applications because of its wide bandgap. Diode is the most basic semiconductor device. The unipolar Schottky barrier diode (SBD) has faster switching speed, less switching power loss, and a lower cut-in voltage (Von) compare to the bipolar PN diode. Unfortunately, the low metal-semiconductor potential barrier not only provides Schottky diode a smaller Von but also causes a higher leakage current than the PN diode in off-state. By utilizing p+ implantation and trench structure, the Trench Junction Barrier Schottky (TJBS) diode can improve the high leakage current drawback of the Schottky diode without significantly sacrifice its good on-state performance.
A novel TJBS diode which has Schottky junction at both top and trench sidewall has been fabricated. However, the on current decreases as the trench depth increases owing to the difference crystallographic faces of the top and sidewall. This difference let the sidewall, which has a higher Schottky barrier height (SBH), can’t be successfully turn on.
In this thesis, we try to apply Ar plasma treatment to eliminate the Schottky barrier height difference between top and sidewall. We fabricate the sidewall SBD with a new process by using PN junction to isolate trench top and trench bottom. This process is simple and makes the investigation on sidewall SBD much easy. The results show that after sidewall modification which consists of Ar plasma treatment and 500 oC post-metal-deposition annealing, the difference in SBH is only 0.06 eV. We also compare our new TJBS with conventional ones by using TCAD simulation to clarify its merit and the drawback that require further improvement. Our new TJBS diode that with 1.49 eV SBH SBD has higher on-state current without sacrificing the off-state characteristics compared to the conventional TJBS diode. With the same 1.5 μm trench depth and 3 μm junction spacing, the on-state current at 1.5 V of out TJBS diode is about 170% of that of the conventional TJBS diode.
In conventional SiC process, we usually deposit a SiO2 layer as the field oxide by CVD method but this isolation technology is quite primitive compare to the Si. Several researches about LOCOS isolation on 4H-SiC have been performed recently by our group. Unlike on 6H-SiC, LOCOS process which performed by pre-amorphous implantation on 4H-SiC showed a poly-crystalline free result. In this thesis, we continue the study on LOCOS by fabricating 4H-SiC LOCOS Schottky diodes. We try to figure out the difference between the LOCOS isolation and the primitive CVD oxide isolation to evaluate our LOCOS process is ready for device processing or still need further improvement. The fabricated LOCOS diodes do show some undesirable result caused by the nonideal periphery region but these drawback can be easily eliminated by introducing a guard ring. With the semi-recessed oxide structure, this LOCOS isolation process have a great potential for 4H-SiC IC fabrication.

並列關鍵字

LOCOS Isolation ； Trench Junction Barrier Schottky Diode ； Isolation Technology of 4H-SiC ； 4H-SiC

參考文獻

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