近年來深部腦刺激技術已被視為對神經相關疾病,如:帕金森氏症、癲癇等能得到相當程度的改善。相較於傳統的開迴路式深腦刺激系統。閉迴路的深腦刺激系統更佳省電,能減少病人更換電池的手術次數,也能延長病患對刺激的效果。本論文提出一個使用在閉迴路深腦刺激系統內的具雜訊去除電路之類比前端放大器,主要針對β-band 的局部場電位訊號進行量測,由於和刺激器共用同個電極,本論文使用了放大遮沒以及電壓限制技術來逐級的消除刺激雜訊,避免刺激雜訊去影響到前端放大器的運作。整個具雜訊去除電路之類比前端放大器與一已設計好的十位元差量調變逐次漸進式類比數位轉換器整合成一個類比前端系統。此系統包含四個具雜訊去除電路之低雜訊前端放大器、一個雜訊去除電路控制器、四個可程式增益放大器、一個四通道多功器、一個轉阻放大器和一個類比數位轉換器。高頻截止頻率為102 Hz,低頻截止頻率可低於1Hz,可以針對6V正刺激做抵擋,整個類比前端放大器增益為50-70dB,並有很高的線性度,功率消耗為42.57μW。平均每個通道所消耗的功率為9.4μW。另外有一和定電流刺激器整合的版本,利用刺激器本身也使用的電壓限制技術。可以對放大器的抗刺激電路再進行簡化並且能抵擋±6V刺激電壓。在台灣積體電路製造股份有限公司與國家晶片系統中心的幫助下,此類比前端電路晶片將以 0.18 微米標準製程實現。
This paper presents a 4-channel analog front-end acquisition (AFEA) circuit with artifact removal (AR) of local-filed potentials (LFPs) for closed-loop deep brain stimulation (DBS) devices. The AFEA is combined with 4-channel front-end amplifier (FEA) with AR, a 4-to-1 multiplexer (MUX), a transimpedance amplifier (TIA) [10] and a delta-modulated SAR ADC (DMSAR ADC) [11]. The AFEA with AR is designed for stimulation artifacts removal, amplification, filtering, and converting to digital signals of LFPs, the LFP signals have the characteristics of small amplitudes, low frequency. The AFEA with AR is fabricated in TSMC 0.18μm CMOS process can adjust gain at three steps (50.1/61.0/69.7 dB) digitally, the high-pass corner is 0.55Hz and low-pass corner is 102 Hz. The input-referred noise of the AFEA is 1.78μVrms. The stimulation artifact tolerance range is 6V. The whole AFEA power consumption is 42.57μW where 9.4μW per channel. Moreover, a new AR circuit with amplifier blanking and voltage limiting techniques is designed to incorporate the FEA with a designed constant current stimulator and has ±6V artifact tolerance range.