電漿蝕刻MIM薄膜電容之製程技術應用與研究

Process Application and Research of Metal-Insulator-Metal Thin Film Capacitor by Plasma Etching

羅榮村(Jung-Tsun Lo)

指導教授 ： 林建中

國立交通大學/光電學院/光電科技學程/碩士(2019年)

摘要

金屬-絕緣層-金屬電容在半導體晶片上的應用日益廣泛，隨著市場上的電子產品要求更小的尺寸，更強大的功能，驅使設計發展出新的電晶體結構及使用到特殊材料 (如介電常數高的介電質/金屬閘極)。這些新技術和新材料的發展使得晶片的線寬得以繼續縮小。
目前最先進的電晶體其尺寸已經達到原子等級，其對於製造而言是極大的挑戰，如果元件結構的精度控制無法達到標準，元件的性能就會受到影響，因此在元件的製造流程中對其線寬(CD)及形狀(profile)需要精準的控制。
本篇研究主要是針對金屬-絕緣層-金屬薄膜電容以電漿蝕刻，研究以各項蝕刻參數調整不同薄膜形狀(profile)，達到精準控制符合業界應用的標準。

關鍵字

電容 ； 蝕刻 ； 輪廓 ； 電漿

並列摘要

Metal-insulator-metal capacitors are increasingly used on semiconductor wafers. As electronic products on the market demand smaller dimensions and more powerful functions, they drive the design to develop new transistor structures and use special materials (eg, Dielectric constant / high dielectric constant / metal gate). The development of these new technologies and new materials has allowed the line width of wafers to continue to shrink.
The current state-of-the-art transistor has reached an atomic level in size, which is a great challenge for manufacturing. If the precision of the element structure cannot be controlled to a standard, the performance of the element will be affected. Therefore, it is necessary to precisely control the line width (CD) and profile in the component manufacturing process.
This research mainly focuses on the plasma etching of metal-insulator-metal film capacitors and studies the adjustment of different film profiles with various etching parameters to achieve precise control in accordance with industry standards.

並列關鍵字

MIM capacitor ； sidewall ； plasma etch ； RIE

參考文獻

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