本論文透過一體成型之鍺量子點技術,應用於金氧半場效電晶體之通道區製作成鍺量子點/二氧化矽/矽鍺殼層之異質結構。同時利用蝕刻機台的參數調變研究,更加優化複晶矽鍺奈米柱的形成。不僅取得適合的蝕刻率,也讓複晶矽鍺奈米柱的輪廓更加陡直,使其在經過選擇性氧化形成鍺量子點時的位置掌控更為熟稔。而鍺量子點與矽鍺殼層間3 ~ 4 nm的二氧化矽則是解決了矽/鍺界面的晶格不匹配同時也作為閘極介電層,並以單晶、品質高的鍺量子點及矽鍺殼層作為光吸收層。閘極金屬則是選用可透光之氧化銦錫作為電極,製作出可垂直入射並適用於850 nm ~ 1550 nm近紅外光的光電晶體。 本論文透過改變矽基板type,從N-type矽改成P-type矽製作出閘氧化層3.5 nm、鍺量子點大小為50 nm的光電晶體。當元件開啟狀態時,不僅光電流提升,以光功率約4.7 nW、3.92 W、87.3 nW,波長850 nm、1310 nm及1550 nm光垂直入射下,光響應度分別為4255.3 A/W、1.58 A/W及38.9 A/W。另外以相同小功率照射所得的光響應度更是較同結構(鍺量子點大小、閘氧化層厚度)下的PMOS元件高出約2.3 ~ 6倍,顯示元件對於近紅外光波段的光響應度相當出色。
In this thesis, we used the technology of Germanium quantum dots in a single process forming to fabricated a heterostructure of Ge Quantum Dots/SiO2/SiGe shell in the channel of a MOSFET. In order to optimize the forming of poly-SiGe pillar, we tune the etcher not only to get the adaptive etching rate and more vertical profile, but also to further control the distribution of Ge quantum dots. The 3-4 nm-thickness SiO2 between Ge QD and SiGe shell acts the gate oxide, solved the lattice mismatch at interface of Si-Ge. For normal incidence optimal transmission and applied to wavelength 850 nm to 1550 nm, we get the single-crystallize, high quality Ge QDs and SiGe shell for absorption layer and use ITO which is transparent as the gate electrode. We change the type of silicon substrate from N-type to P-type to manufacture 50 nm QD-NMOS with 3.5 nm-thickness gate oxide. At on state, the photocurrent is more higher, in addition, under normal illumination of incident power about 4.7 nW, 3.92 W, 87.3 nW at wavelength of 850 nm, 1310 nm, and 1550 nm, we can get the photoresponsivity that is 4255.3 A/W, 1.58 A/W, and 38.9 A/W, respectively. In other hand, compared with the PMOS device with same condition in other structure parameters, size of Ge QDs and thickness of gate oxide, the photoresponsivity of NMOS is about 2.3 ~ 6 times higher than PMOS. Combine the measurement results above showing that the phototransistor has a great performance in the near-infrared ray regime.