透過您的圖書館登入
IP:18.216.124.8
  • 學位論文

低熱預算聚醯亞胺於三維整合平台之非對稱銅錫混合接合應用及其材料特性分析

Application and Material Properties of Low Thermal Budget Polyimide in Asymmetric Cu/Sn Hybrid Bonding in 3D Integration Platform

指導教授 : 陳冠能
本文將於2024/06/25開放下載。若您希望在開放下載時收到通知,可將文章加入收藏

摘要


混和接合技術為三維積體電路關鍵技術之一,其具有高材料選擇性與高半導體製程相容性,可實現晶片異質封裝並達到低功率、小尺寸與更多功能的整合產品。因此,此技術在產業界與學術界皆是相當重視的封裝技術,目前正朝著低熱預算與細間距的需求邁進。 在混和接合技術中,高分子與金屬需於接合過程中分別完成接合。傳統的聚醯亞胺材料因其高熟化溫度與高熱預算,較少廣泛應用於接合技術中,本論文提出一低熟化溫度之聚醯亞胺,搭配銅/錫共晶接合,可於250°C下完成非對稱晶圓級混和接合。非對稱結構不僅可有效優化金屬與高分子的製程,並且可實現超薄之薄膜接合技術。此外,在本研究中設計不同的聚醯亞胺材料對焊錫厚度比例,以研究製程的適用範圍。在不同的厚度比下,其特徵接觸阻值皆落在10-7~10-8 Ω-cm2,並通過熱循環與高濕度之可靠度測試。綜合上述結果,此非對稱性混合接合結構於未來之三維異質整合技術之應用極俱潛力。 除混合接合製程與其電性外,本論文亦針對聚醯亞胺材料與半導體製程相容性以及材料之間附著強度進行研究。在線路重佈技術中,聚醯亞胺將沉積於鈍化層之上,因此聚醯亞胺與鈍化層之間的附著強度與溫度可靠度相當重要。此外,將使用鈦/銅金屬作為金屬連線並沉積於聚醯亞胺之上,因此亦由四點彎曲量測系統,針對聚醯亞胺對於鈦/銅金屬與其電鍍製程的附著強度進行研究。而材料分析部分,透過原子力顯微鏡、接觸角量測系統與X射線光電子能譜儀針對接著介面進行更深入的討論與分析。

並列摘要


Hybrid bonding technology is one of the key technologies of 3D integrated circuits (3D IC). It has high material selectivity and high semiconductor process compatibility, enabling heterogeneous integration and achieving of lower power, smaller size and more functional products. Therefore, this technology is highly valued in both industry and academia, and is currently moving toward low thermal budget and fine pitch requirements. In hybrid bonding techniques, the polymer and metal need to be bonded during the bonding process, respectively. Conventional polyimides are less used in bonding technology due to their high curing temperature and high thermal budget. This thesis proposes a low curing temperature polyimide that can be combined with Cu/Sn eutectic bonding to achieve asymmetric wafer-level hybrid bonding at 250°C. The asymmetric structure can not only effectively optimize the processing of metals and polymers, but also achieve ultra-thin film bonding. In addition, the ratio of polymer-to-solder thickness was designed to study the applicability of the process. At different thickness ratios, the specific contact resistance value maintained at 10-7~10-8 Ω-cm2, and the thermal cycling tests and humidity reliability tests showed good electrical performance. Therefore, this asymmetric hybrid bonding structure has great potential for future 3D integration technologies. In addition to the hybrid bonding structure and its electrical properties, the compatibility of polyimide materials with semiconductor fabrication process and the adhesion strength of between the materials were investigated. Since the polyimide layer is deposited on the passivation layer in the redistribution layer (RDL), the adhesion strength and thermal reliability between the polyimide layer and the passivation layer are very important. Moreover, the Ti/Cu metal wires were deposited on the polyimide layer. Therefore, the adhesion strength between polyimide layer and Ti/Cu layer after certain electroplating process were also evaluated by the four-point bending system. By using scanning electron microscope and X-ray photoelectron spectroscopy, the bonding mechanism and behavior were observed and analyzed.

並列關鍵字

Hybrid bonding Polyimide Adhesion Asymmetric Wafer-level

參考文獻


Reference
[1] G. E. Moore, "Cramming more components onto integrated circuits, Reprinted from Electronics, volume 38, number 8, April 19, 1965, pp.114 ff," IEEE Solid-State Circuits Society Newsletter, vol. 11, no. 3, pp. 33-35, 2006.
[2] S. Shankland. (2012). Moore's Law: The rule that really matters in tech. Available: https://www.cnet.com/news/moores-law-the-rule-that-really-matters-in-tech/
[3] L. Clavelier, C. Deguet, L. D. Cioccio, E. Augendre, A. Brugere, P. Gueguen, Y. L. Tiec, H. Moriceau, M. Rabarot, T. Signamarcheix, J. Widiez, O. Faynot, F. Andrieu, O. Weber, C. L. Royer, P. Batude, L. Hutin, J. Damlencourt, S. Deleonibus, and E. Defaÿ, "Engineered substrates for future More Moore and More than Moore integrated devices," in 2010 International Electron Devices Meeting, 2010, pp. 2.6.1-2.6.4.
[4] K. Ahmed and K. Schuegraf, "Transistor wars," IEEE Spectrum, vol. 48, no. 11, pp. 50-66, 2011.

延伸閱讀