具高開關比與低操作電壓之有機高分子電晶體

Vertical Polymer Transistor with high on/off ratio and low operation voltage

林怡成(Yi-Cheng Lin)

指導教授 ： 孟心飛

國立交通大學/理學院/物理研究所/碩士(2009年)

https://doi.org/10.6842/NCTU.2009.00254

摘要

軟性電子與顯示技術是新世代電子技術領域之重要方向，有機電晶體更是因為低製作成本、易於大面積製作等優點而被許多專家學者廣泛研究。傳統之有機場效應電晶體具有在同一平面之源極與汲極，屬於水平式結構，因其難以縮短通道長度，及受限於高分子材料之低載子遷移率等原因，導致高操作電壓與低輸出電流等缺點。有人提出以膜厚控制通道長度的垂直式電晶體來解決此問題，但卻因為製程因素，大部分提高了輸出電流卻犧牲了開關比到只剩數百。有鑒於此，本論文將介紹一種具有製程簡單、低操作電壓、輸出電流大特性之垂直式有機電晶體。
本論文旨在實現並探討高分子空間電荷限制電晶體，文中詳細介紹其初代結構與新穎式結構，並針對其製程與特性討論。
首先介紹此元件之初代模型結構，並討論其操作原理與元件特性，柵極上之孔洞大小及密度將影響電晶體元件操作特性，初代結構之空間電荷限制電晶體在操作電壓6V時，其輸出電流為27mA/cm2，開關比為428，電流增益約為10^4。將此電晶體與一有機上發光二極體整合後，電晶體的確可以驅動並調變發光強度，且有機上發光二極體之最大發光亮度可達1343 cd/m2。
第二部份將由結構上改良此電晶體，成為一新穎式結構之空間電荷限制電晶體，此結構有別於初代結構，絕緣體完整包覆柵極，故能大幅降低Off current提高開關比，此外，以電漿處理射極有助電洞注入半導體，降低操作電壓。新穎式空間電荷限制電晶體在操作電壓2V時，其輸出電流為5.15mA/cm2，開關比大幅提升至10775，電流增益約為104。
論文最後證明了電洞注入半導體之能障，隨著氧電漿處理射極至沉積半導體之時距延長而變大，最佳注入為時距為2分鐘內。優化後之新穎空間電荷限制電晶體只需極低之操作電壓約0.8V，即可維持高開關比約為10^4，電流增益約為10^4，輸出電流密度約1.36 mA/cm2。

關鍵字

有機高分子 ； 電晶體 ； 垂直式 ； 空間電荷限制電晶體

並列摘要

Polymer transistors have been studied extensively due to their applications on low-cost large-area transistor arrays or on flexible electronics. Conventional polymer field-effect transistor (FET) is a horizontal device with source and drain electrodes in the same plane. Low mobility conjugated polymers and long channel length seriously limit the characteristics of polymer FET, and thus polymer FET usually exhibits high operation voltage and low operation frequency. To circumvent these limitations various vertical transistors with short channel length perpendicular to the substrate are proposed. For vertical transistor, the channel length is determined by the total thickness of the organic semiconductor layer between source and drain. Even high turn-on current has been obtained, low on/off ratio and sophisticated vertical fabrication procedures limit its following development. Specifically, on/off ratio of most vertical transistors are as low as a few hundreds.
This dissertation aims to develop organic transistors named polymer space-charge-limited transistors with high on/off ratio. Two prototypes are demonstrated in this dissertation. Fabrication procedures and discussion are also provided.
First, operation principles and device performance of the first prototype of the space-charge-limited transistor are discussed. The effects of the opening diameter and the opening density on the transistor characteristics are also demonstrated. Under the operation voltage of 6 V, the first prototype of the space-charge-limited transistor possesses the output current density of 27 mA/cm2, on/off ratio of 428, and current gain about 10^4. After integrating an OLED on this transistor, the max brightness of 1343cd/m2 is achieved.
Second, the second prototype of the space-charge-limited transistor is demonstrated. With a grid electrode covered with insulator and a better device geometric structure, the off current and hence the on/off ratio are improved. Under the operation voltage of 2 V, the output current density is about 5.15mA/cm2, on/off ratio is as high as 10775, current gain is 104, under the low operation voltage about 2V.
At the end of this dissertation, a method for further improving the performance of the second prototype of the space-charge-limited transistor is demonstrated. It is demonstrated that after O2 plasma treatment of the ITO emitter electrode, the hole injection barrier between the ITO emitter and the polymer is increased while store the pla sma treated ITO substrate in the glove box for a long time. Minimum hole injection barrier is achieved by spin coating semiconducting polymer onto the plasma treated ITO emitter within 2 minutes. Under the operation voltage of 0.8V, the output current density is about 1.36mA/cm2, the on/off ratio is around 10^4, and the current gain is 10^4.

並列關鍵字

Polymer ； transistor ； vertical ； SCLT

參考文獻

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