尾電流塑形低相位雜訊暨 電流共用低功率四相位輸出壓控振盪器設計與研究

Design of Tail Current-Shaping Low Phase Noise QVCO and Current-reused Low Power QVCO

黃子哲(Tze-Che Huang)

指導教授 ： 周復芳

國立交通大學/電機學院/電信工程系所/碩士(2009年)

https://doi.org/10.6842/NCTU.2009.00330

摘要

本論文討論分為兩部份，第一部份為利用尾電流塑型技巧達成低相位雜訊目地之四相位輸出壓控振盪器，第二部份為利用電流共用架構達成低功率消耗之四相位輸出壓控振盪器。在第一部份，我們利用了兩個差動輸出一階諧波鎖相振盪器建構出一尾電流塑形四相位輸出壓控振盪器。利用此振盪器之輸出訊號作為尾端電流源之電晶體閘極端的交流輸入訊號我們可以達成降低相位雜訊之目地。本四相位壓控振盪器由TSMC 0.18μm mixed-signal/RF CMOS 1P6M製程實現，晶片面積為0.7x1.1 mm^2。量測結果顯示出:本壓控振盪器之振盪頻率為5.28GHz，在供應電壓為1.4V之條件下損耗功率為11.2mW，相位雜訊為-119.3dBc/Hz@1MHz。
第二部份本論文提出一電流共用架構來降低壓控振盪器之功率消耗。藉由此共用電流之方法，我們可將振盪器之功率消耗降至為原先的二分之一。我們將兩差動輸出電流共用振盪器利用背閘極耦合(Back-Gate Coupling)方式建構出一四相位輸出振盪器來達成低功率損耗之目地。模擬結果顯示：本壓控振盪器之振盪頻率為10GHz，在供應電壓為1.2V之條件下損耗功率僅為1.64mW，相位雜訊為-111.7dBc/Hz@1MHz。

關鍵字

振蕩器 ； 尾電流塑形 ； 電流共用

並列摘要

This thesis discusses about designs of tail current-shaping low-phase noise QVCO and current-reused low power QVCO. In the first part, we present a new tail current-shaping quadrature voltage-controlled oscillator (QVCO) which consists of two first-harmonic injection-locked oscillators (ILOs). The outputs of the proposed QVCO are injected back to the gates of the QVCO’s tail transistors in order to shape the tail current. With the implementation of tail current-shaping, the RMS value of the effective impulse sensitivity function (ISF) of the proposed QVCO is 40% smaller than the conventional QVCO topology. The proposed CMOS LC-tank QVCO has been implemented with the TSMC 0.18μm mixed-signal/RF CMOS 1P6M technology and the die area is 0.7x1.1 mm^2. The total power consumption is 11.2 mW at the supply voltage of 1.4 V. The measured phase noise at 1MHz offset is -119.3dBc/Hz at the oscillation frequency of 5.28 GHz and the figure of merit (FOM) of the proposed QVCO is about -183dBc/Hz.
In the second part, we propose a current-reused QVCO topology to reduce the power consumption. In our design, the proposed QVCO consists of two NMOS current-reused differential VCO. The qudra-phase signals are coupled by back-gate coupling technique. Therefore, the power consumption of the proposed QVCO can be cut in half by reusing the dc currents compared to the conventional QVCO topologies. The simulated results show that the total power consumption is about 1.64 mW since the QVCO core circuit draws 1.37 mA from a 1.2 V V_dd supply. The simulated phase noise at 1 MHz offset is-111.7dBc/Hz at the oscillation frequency of 10 GHz and the FOM is about -189.6dBc/Hz.

並列關鍵字

VCO ； Current-Shaping ； Current-Reused

參考文獻

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