用於矽穿孔之三維積體電路完整電源供應之分析

Power Integrity for TSV 3D Integration

楊博任(Po-Jen Yang)

指導教授 ： 黃威

國立交通大學/電機學院/電子工程系所/碩士(2011年)

https://doi.org/10.6842/NCTU.2011.01000

摘要

本論文針對矽穿孔（through-silicon-via, TSV）之三維積體電路提出一個
的階層式電源供應系統（hierarchical power delivery system)，此電源供應
系統包含多種雜訊抑制技術以提供電路穩定電源。所提出的階層式電源供應利用
電源調節模組（voltage regulator modules）分離全域與區域的電源供應網絡，
此種階層式架構將能降地電路對於解耦合電容（decoupling capacitor）的需求
並提供電路較彈性的電壓源。此外，為了能在全域與區域的電源供應網絡上獲得
良好的雜訊抑制，我們分別採用“主動切換式解耦合電容電路”及“偏壓電流可
調節式之低壓降電源穩壓器（adaptively biased regulator）”。針對基板傳
遞雜訊及矽穿孔耦合雜訊，我們也提出了一套有效的基板雜訊抑制技術以達到更
優良的電源供應品質。另一方面，我們也針對矽穿孔擺放及數目提出一個設計方
法，能在合理的電壓降損失下，規劃出最小面積的矽穿孔孔徑與數量。
我們以一個異質矽穿孔三維整合系統（heterogeneous TSV 3D integration）
做為電源完整供應性的研究案例，根據模擬結果顯示，本論文所提出的階層式電
源供應系統能在電源供應網絡上有效抑制71.10%的雜訊，並且僅需多花費1.11%
的額外功率消耗。如此具有高電源供應品質又不需大幅修改設計架構的階層式電
源供應系統，相信對於異質矽穿孔三維整合會有相當程度的幫助

關鍵字

電源供應 ； 矽穿孔 ； 三維積體電路

並列摘要

In this thesis, a hierarchical power delivery system is proposed for the power integrity of through-silicon-via (TSV) 3D integrations using various noise reduction techniques. The proposed hierarchical power delivery system decouples the global power network and the local power networks not only for reducing the required decoupling capacitors (DECAPs) but providing flexible power sources. For achieving the further power noise reduction both in the global and local power networks, an active switching DECAPs and adaptively biased low dropout regulators are adopted as the global regulator and local regulators, respectively. Additionally, a substrate noise suppression technique is also presented to enhance the power integrity by reducing both substrate and TSV coupling noises. Moreover, a design methodology for area-efficient power TSV planning is proposed to optimize the area-occupancy and voltage drop performance.
The simulation results of a heterogeneous TSV 3D integration demonstrate that the noise reduction on power supply pairs (VDD + GND) are suppressed by up to 71.10% with only 1.11% power overhead based on the proposed hierarchical power delivery system. Therefore, the proposed hierarchical power delivery system is very useful for the power integrity of the heterogeneous integration in TSV 3D-ICs.

並列關鍵字

Power Integrity ； TSV ； 3D IC

參考文獻

Chapter 1

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[1.5] X. Meng and R. Saleh, “An Improved Active Decoupling Capacitor for Hot-Spot Supply Noise Reduction in ASIC Designs,” IEEE Journal of Solid-State Circuits, vol. 44, no. 2, pp. 584-593, Feb. 2009.

[2.1] E. Beyne, “The rise of the 3rd dimension for system integration,” IEEE International Interconnect Technology Conference, 2006, pp.1-5.

[2.2] R. R. Tummala, V. Sundaram, R. Chatterjee, P.M. Raj, N. Kumbhat, V. Sukumaran, V. Sridharan, A. Choudury, Q. Chen, and T. Bandyopadhyay, “Trend from ICs to 3D ICs to 3D Systems,” in Proc. IEEE Conf. Custom Integrated Circuits Conference, pp. 439-444, Sept. 2009.